Add credits for MME shadow RAM

Implementation was based on this Ryujinx PR: https://github.com/Ryujinx/Ryujinx/pull/987

src/video_core/engines/maxwell_3d.cpp

@@ -122,6 +122,13 @@ void Maxwell3D::CallMacroMethod(u32 method, std::size_t num_parameters, const u3
 void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
     const u32 method = method_call.method;
 
+    // Keep track of the register value in shadow_regs when requested.
+    if (method < Regs::NUM_REGS &&
+        (regs.shadow_ram_control == Regs::ShadowRamControl::Track ||
+         regs.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter)) {
+        shadow_regs.reg_array[method] = method_call.argument;
+    }
+
     if (method == cb_data_state.current) {
         regs.reg_array[method] = method_call.argument;
         ProcessCBData(method_call.argument);

src/video_core/engines/maxwell_3d.h

@@ -531,6 +531,18 @@ public:
             Fill = 0x1b02,
         };
 
+        // Thanks to fincs for reverse engineering
+        // MME shadow RAM and Ryujinx for providing
+        // the base for the implementation.
+        // https://github.com/fincs
+        // https://github.com/Ryujinx/Ryujinx/pull/987
+        enum class ShadowRamControl : u32 {
+            Track = 0,
+            TrackWithFilter = 1,
+            Passthrough = 2,
+            Replay = 3,
+        };
+
         struct RenderTargetConfig {
             u32 address_high;
             u32 address_low;
@@ -674,7 +686,9 @@ public:
                     u32 bind;
                 } macros;
 
-                INSERT_UNION_PADDING_WORDS(0x17);
+                ShadowRamControl shadow_ram_control;
+
+                INSERT_UNION_PADDING_WORDS(0x16);
 
                 Upload::Registers upload;
                 struct {
@@ -1263,7 +1277,10 @@ public:
             };
             std::array<u32, NUM_REGS> reg_array;
         };
-    } regs{};
+    };
+
+    Regs regs{};
+    Regs shadow_regs{};
 
     static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
     static_assert(std::is_trivially_copyable_v<Regs>, "Maxwell3D Regs must be trivially copyable");
@@ -1458,6 +1475,7 @@ private:
                   "Field " #field_name " has invalid position")
 
 ASSERT_REG_POSITION(macros, 0x45);
+ASSERT_REG_POSITION(shadow_ram_control, 0x49);
 ASSERT_REG_POSITION(upload, 0x60);
 ASSERT_REG_POSITION(exec_upload, 0x6C);
 ASSERT_REG_POSITION(data_upload, 0x6D);

src/video_core/macro_interpreter.cpp

@@ -328,6 +328,12 @@ void MacroInterpreter::SetMethodAddress(u32 address) {
 }
 
 void MacroInterpreter::Send(u32 value) {
+    // Use the tracked value in shadow_regs when requested.
+    if (method_address.address < Engines::Maxwell3D::Regs::NUM_REGS &&
+        maxwell3d.regs.shadow_ram_control == Engines::Maxwell3D::Regs::ShadowRamControl::Replay) {
+        value = maxwell3d.shadow_regs.reg_array[method_address.address];
+    }
+
     maxwell3d.CallMethodFromMME({method_address.address, value});
     // Increment the method address by the method increment.
     method_address.address.Assign(method_address.address.Value() +