NvDrv/nvhost-as-gpu: Ensure that the object passed to MapBufferEx has already been allocated.

Also added a consistency check and a comment for the case when the object id is different than its handle. The real nvservices doesn't make a distinction between ids and handles, each object gets an unique handle which doubles as its id.

src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp

@@ -27,6 +27,11 @@ u32 nvhost_as_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vecto
     case IoctlCommand::IocGetVaRegionsCommand:
         return GetVARegions(input, output);
     }
+
+    if (static_cast<IoctlCommand>(command.cmd.Value()) == IoctlCommand::IocRemapCommand)
+        return Remap(input, output);
+
+    UNIMPLEMENTED_MSG("Unimplemented ioctl command");
     return 0;
 }
 
@@ -56,6 +61,36 @@ u32 nvhost_as_gpu::AllocateSpace(const std::vector<u8>& input, std::vector<u8>&
     return 0;
 }
 
+u32 nvhost_as_gpu::Remap(const std::vector<u8>& input, std::vector<u8>& output) {
+    size_t num_entries = input.size() / sizeof(IoctlRemapEntry);
+
+    NGLOG_WARNING(Service_NVDRV, "(STUBBED) called, num_entries=0x{:X}", num_entries);
+
+    std::vector<IoctlRemapEntry> entries(num_entries);
+    std::memcpy(entries.data(), input.data(), input.size());
+
+    auto& gpu = Core::System::GetInstance().GPU();
+
+    for (const auto& entry : entries) {
+        NGLOG_WARNING(Service_NVDRV, "remap entry, offset=0x{:X} handle=0x{:X} pages=0x{:X}",
+                      entry.offset, entry.nvmap_handle, entry.pages);
+        Tegra::GPUVAddr offset = static_cast<Tegra::GPUVAddr>(entry.offset) << 0x10;
+
+        auto object = nvmap_dev->GetObject(entry.nvmap_handle);
+        ASSERT(object);
+
+        ASSERT(object->status == nvmap::Object::Status::Allocated);
+
+        u64 size = static_cast<u64>(entry.pages) << 0x10;
+        ASSERT(size <= object->size);
+
+        Tegra::GPUVAddr returned = gpu.memory_manager->MapBufferEx(object->addr, offset, size);
+        ASSERT(returned == offset);
+    }
+    std::memcpy(output.data(), entries.data(), output.size());
+    return 0;
+}
+
 u32 nvhost_as_gpu::MapBufferEx(const std::vector<u8>& input, std::vector<u8>& output) {
     IoctlMapBufferEx params{};
     std::memcpy(&params, input.data(), input.size());
@@ -73,6 +108,16 @@ u32 nvhost_as_gpu::MapBufferEx(const std::vector<u8>& input, std::vector<u8>& ou
     auto object = nvmap_dev->GetObject(params.nvmap_handle);
     ASSERT(object);
 
+    // We can only map objects that have already been assigned a CPU address.
+    ASSERT(object->status == nvmap::Object::Status::Allocated);
+
+    ASSERT(params.buffer_offset == 0);
+
+    // The real nvservices doesn't make a distinction between handles and ids, and
+    // object can only have one handle and it will be the same as its id. Assert that this is the
+    // case to prevent unexpected behavior.
+    ASSERT(object->id == params.nvmap_handle);
+
     auto& gpu = Core::System::GetInstance().GPU();
 
     if (params.flags & 1) {

src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h

@@ -26,6 +26,7 @@ private:
     enum class IoctlCommand : u32_le {
         IocInitalizeExCommand = 0x40284109,
         IocAllocateSpaceCommand = 0xC0184102,
+        IocRemapCommand = 0x00000014,
         IocMapBufferExCommand = 0xC0284106,
         IocBindChannelCommand = 0x40044101,
         IocGetVaRegionsCommand = 0xC0404108,
@@ -54,6 +55,16 @@ private:
     };
     static_assert(sizeof(IoctlAllocSpace) == 24, "IoctlInitalizeEx is incorrect size");
 
+    struct IoctlRemapEntry {
+        u16_le flags;
+        u16_le kind;
+        u32_le nvmap_handle;
+        INSERT_PADDING_WORDS(1);
+        u32_le offset;
+        u32_le pages;
+    };
+    static_assert(sizeof(IoctlRemapEntry) == 20, "IoctlRemapEntry is incorrect size");
+
     struct IoctlMapBufferEx {
         u32_le flags; // bit0: fixed_offset, bit2: cacheable
         u32_le kind;  // -1 is default
@@ -91,6 +102,7 @@ private:
 
     u32 InitalizeEx(const std::vector<u8>& input, std::vector<u8>& output);
     u32 AllocateSpace(const std::vector<u8>& input, std::vector<u8>& output);
+    u32 Remap(const std::vector<u8>& input, std::vector<u8>& output);
     u32 MapBufferEx(const std::vector<u8>& input, std::vector<u8>& output);
     u32 BindChannel(const std::vector<u8>& input, std::vector<u8>& output);
     u32 GetVARegions(const std::vector<u8>& input, std::vector<u8>& output);

src/video_core/renderer_opengl/gl_rasterizer_cache.cpp

@@ -49,7 +49,6 @@ struct FormatTuple {
 static constexpr std::array<FormatTuple, SurfaceParams::MaxPixelFormat> tex_format_tuples = {{
     {GL_RGBA8, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8_REV, false, 1},                     // ABGR8
     {GL_RGB, GL_RGB, GL_UNSIGNED_SHORT_5_6_5_REV, false, 1},                        // B5G6R5
-    {GL_RGB10_A2, GL_RGBA, GL_UNSIGNED_INT_2_10_10_10_REV, false, 1},               // A2B10G10R10
     {GL_COMPRESSED_RGB_S3TC_DXT1_EXT, GL_RGB, GL_UNSIGNED_INT_8_8_8_8, true, 16},   // DXT1
     {GL_COMPRESSED_RGBA_S3TC_DXT3_EXT, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8, true, 16}, // DXT23
     {GL_COMPRESSED_RGBA_S3TC_DXT5_EXT, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8, true, 16}, // DXT45
@@ -105,9 +104,9 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, u8* gl_buffer, VAddr b
 static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
                             SurfaceParams::MaxPixelFormat>
     morton_to_gl_fns = {
-        MortonCopy<true, PixelFormat::ABGR8>,       MortonCopy<true, PixelFormat::B5G6R5>,
-        MortonCopy<true, PixelFormat::A2B10G10R10>, MortonCopy<true, PixelFormat::DXT1>,
-        MortonCopy<true, PixelFormat::DXT23>,       MortonCopy<true, PixelFormat::DXT45>,
+        MortonCopy<true, PixelFormat::ABGR8>, MortonCopy<true, PixelFormat::B5G6R5>,
+        MortonCopy<true, PixelFormat::DXT1>,  MortonCopy<true, PixelFormat::DXT23>,
+        MortonCopy<true, PixelFormat::DXT45>,
 };
 
 static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
@@ -115,7 +114,6 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
     gl_to_morton_fns = {
         MortonCopy<false, PixelFormat::ABGR8>,
         MortonCopy<false, PixelFormat::B5G6R5>,
-        MortonCopy<false, PixelFormat::A2B10G10R10>,
         // TODO(Subv): Swizzling the DXT1/DXT23/DXT45 formats is not yet supported
         nullptr,
         nullptr,

src/video_core/renderer_opengl/gl_rasterizer_cache.h

@@ -54,10 +54,9 @@ struct SurfaceParams {
     enum class PixelFormat {
         ABGR8 = 0,
         B5G6R5 = 1,
-        A2B10G10R10 = 2,
-        DXT1 = 3,
-        DXT23 = 4,
-        DXT45 = 5,
+        DXT1 = 2,
+        DXT23 = 3,
+        DXT45 = 4,
 
         Max,
         Invalid = 255,
@@ -89,7 +88,6 @@ struct SurfaceParams {
         constexpr std::array<unsigned int, MaxPixelFormat> bpp_table = {
             32,  // ABGR8
             16,  // B5G6R5
-            32,  // A2B10G10R10
             64,  // DXT1
             128, // DXT23
             128, // DXT45
@@ -106,8 +104,6 @@ struct SurfaceParams {
         switch (format) {
         case Tegra::RenderTargetFormat::RGBA8_UNORM:
             return PixelFormat::ABGR8;
-        case Tegra::RenderTargetFormat::RGB10_A2_UNORM:
-            return PixelFormat::A2B10G10R10;
         default:
             NGLOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
             UNREACHABLE();
@@ -131,8 +127,6 @@ struct SurfaceParams {
             return PixelFormat::ABGR8;
         case Tegra::Texture::TextureFormat::B5G6R5:
             return PixelFormat::B5G6R5;
-        case Tegra::Texture::TextureFormat::A2B10G10R10:
-            return PixelFormat::A2B10G10R10;
         case Tegra::Texture::TextureFormat::DXT1:
             return PixelFormat::DXT1;
         case Tegra::Texture::TextureFormat::DXT23:
@@ -152,8 +146,6 @@ struct SurfaceParams {
             return Tegra::Texture::TextureFormat::A8R8G8B8;
         case PixelFormat::B5G6R5:
             return Tegra::Texture::TextureFormat::B5G6R5;
-        case PixelFormat::A2B10G10R10:
-            return Tegra::Texture::TextureFormat::A2B10G10R10;
         case PixelFormat::DXT1:
             return Tegra::Texture::TextureFormat::DXT1;
         case PixelFormat::DXT23:

src/video_core/textures/decoders.cpp

@@ -53,7 +53,6 @@ u32 BytesPerPixel(TextureFormat format) {
         // In this case a 'pixel' actually refers to a 4x4 tile.
         return 16;
     case TextureFormat::A8R8G8B8:
-    case TextureFormat::A2B10G10R10:
         return 4;
     case TextureFormat::B5G6R5:
         return 2;
@@ -79,7 +78,6 @@ std::vector<u8> UnswizzleTexture(VAddr address, TextureFormat format, u32 width,
                          unswizzled_data.data(), true, block_height);
         break;
     case TextureFormat::A8R8G8B8:
-    case TextureFormat::A2B10G10R10:
     case TextureFormat::B5G6R5:
         CopySwizzledData(width, height, bytes_per_pixel, bytes_per_pixel, data,
                          unswizzled_data.data(), true, block_height);
@@ -102,7 +100,6 @@ std::vector<u8> DecodeTexture(const std::vector<u8>& texture_data, TextureFormat
     case TextureFormat::DXT23:
     case TextureFormat::DXT45:
     case TextureFormat::A8R8G8B8:
-    case TextureFormat::A2B10G10R10:
     case TextureFormat::B5G6R5:
         // TODO(Subv): For the time being just forward the same data without any decoding.
         rgba_data = texture_data;

src/video_core/textures/texture.h

@@ -15,7 +15,6 @@ namespace Texture {
 
 enum class TextureFormat : u32 {
     A8R8G8B8 = 0x8,
-    A2B10G10R10 = 0x9,
     B5G6R5 = 0x15,
     DXT1 = 0x24,
     DXT23 = 0x25,

src/yuzu/debugger/graphics/graphics_surface.cpp

@@ -25,8 +25,6 @@ static Tegra::Texture::TextureFormat ConvertToTextureFormat(
     switch (render_target_format) {
     case Tegra::RenderTargetFormat::RGBA8_UNORM:
         return Tegra::Texture::TextureFormat::A8R8G8B8;
-    case Tegra::RenderTargetFormat::RGB10_A2_UNORM:
-        return Tegra::Texture::TextureFormat::A2B10G10R10;
     default:
         UNIMPLEMENTED_MSG("Unimplemented RT format");
     }