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__refs_pul
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2
externals/fmt
vendored
2
externals/fmt
vendored
Submodule externals/fmt updated: c2ce7e4f07...62010520ed
@@ -10,6 +10,7 @@
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#include "common/common_types.h"
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#include "common/swap.h"
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#include "core/hle/service/nvdrv/devices/nvdevice.h"
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#include "video_core/memory_manager.h"
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namespace Service::Nvidia::Devices {
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@@ -251,8 +251,8 @@ std::string ReadCString(VAddr vaddr, std::size_t max_length) {
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return string;
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}
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void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached) {
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if (gpu_addr == 0) {
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void RasterizerMarkRegionCached(VAddr vaddr, u64 size, bool cached) {
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if (vaddr == 0) {
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return;
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}
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@@ -261,19 +261,8 @@ void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached)
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// CPU pages, hence why we iterate on a CPU page basis (note: GPU page size is different). This
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// assumes the specified GPU address region is contiguous as well.
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u64 num_pages = ((gpu_addr + size - 1) >> PAGE_BITS) - (gpu_addr >> PAGE_BITS) + 1;
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for (unsigned i = 0; i < num_pages; ++i, gpu_addr += PAGE_SIZE) {
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boost::optional<VAddr> maybe_vaddr =
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Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(gpu_addr);
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// The GPU <-> CPU virtual memory mapping is not 1:1
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if (!maybe_vaddr) {
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LOG_ERROR(HW_Memory,
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"Trying to flush a cached region to an invalid physical address {:016X}",
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gpu_addr);
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continue;
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}
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VAddr vaddr = *maybe_vaddr;
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u64 num_pages = ((vaddr + size - 1) >> PAGE_BITS) - (vaddr >> PAGE_BITS) + 1;
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for (unsigned i = 0; i < num_pages; ++i, vaddr += PAGE_SIZE) {
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PageType& page_type = current_page_table->attributes[vaddr >> PAGE_BITS];
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if (cached) {
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@@ -344,29 +333,19 @@ void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode) {
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const VAddr overlap_start = std::max(start, region_start);
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const VAddr overlap_end = std::min(end, region_end);
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const std::vector<Tegra::GPUVAddr> gpu_addresses =
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system_instance.GPU().memory_manager->CpuToGpuAddress(overlap_start);
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if (gpu_addresses.empty()) {
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return;
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}
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const u64 overlap_size = overlap_end - overlap_start;
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for (const auto& gpu_address : gpu_addresses) {
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auto& rasterizer = system_instance.Renderer().Rasterizer();
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switch (mode) {
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case FlushMode::Flush:
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rasterizer.FlushRegion(gpu_address, overlap_size);
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break;
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case FlushMode::Invalidate:
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rasterizer.InvalidateRegion(gpu_address, overlap_size);
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break;
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case FlushMode::FlushAndInvalidate:
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rasterizer.FlushAndInvalidateRegion(gpu_address, overlap_size);
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break;
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}
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auto& rasterizer = system_instance.Renderer().Rasterizer();
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switch (mode) {
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case FlushMode::Flush:
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rasterizer.FlushRegion(overlap_start, overlap_size);
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break;
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case FlushMode::Invalidate:
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rasterizer.InvalidateRegion(overlap_start, overlap_size);
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break;
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case FlushMode::FlushAndInvalidate:
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rasterizer.FlushAndInvalidateRegion(overlap_start, overlap_size);
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break;
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}
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};
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@@ -11,7 +11,6 @@
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#include <boost/icl/interval_map.hpp>
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#include "common/common_types.h"
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#include "core/memory_hook.h"
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#include "video_core/memory_manager.h"
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namespace Kernel {
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class Process;
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@@ -179,7 +178,7 @@ enum class FlushMode {
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/**
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* Mark each page touching the region as cached.
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*/
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void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached);
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void RasterizerMarkRegionCached(VAddr vaddr, u64 size, bool cached);
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/**
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* Flushes and invalidates any externally cached rasterizer resources touching the given virtual
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@@ -280,6 +280,19 @@ union Instruction {
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BitField<56, 1, u64> invert_b;
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} lop32i;
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union {
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BitField<28, 8, u64> imm_lut28;
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BitField<48, 8, u64> imm_lut48;
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u32 GetImmLut28() const {
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return static_cast<u32>(imm_lut28);
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}
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u32 GetImmLut48() const {
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return static_cast<u32>(imm_lut48);
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}
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} lop3;
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u32 GetImm20_19() const {
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u32 imm{static_cast<u32>(imm20_19)};
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imm <<= 12;
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@@ -650,6 +663,9 @@ public:
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LOP_R,
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LOP_IMM,
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LOP32I,
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LOP3_C,
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LOP3_R,
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LOP3_IMM,
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MOV_C,
|
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MOV_R,
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MOV_IMM,
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@@ -872,6 +888,9 @@ private:
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INST("0101110001000---", Id::LOP_R, Type::ArithmeticInteger, "LOP_R"),
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INST("0011100001000---", Id::LOP_IMM, Type::ArithmeticInteger, "LOP_IMM"),
|
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INST("000001----------", Id::LOP32I, Type::ArithmeticIntegerImmediate, "LOP32I"),
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INST("0000001---------", Id::LOP3_C, Type::ArithmeticInteger, "LOP3_C"),
|
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INST("0101101111100---", Id::LOP3_R, Type::ArithmeticInteger, "LOP3_R"),
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INST("0011110---------", Id::LOP3_IMM, Type::ArithmeticInteger, "LOP3_IMM"),
|
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INST("0100110001001---", Id::SHL_C, Type::Shift, "SHL_C"),
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INST("0101110001001---", Id::SHL_R, Type::Shift, "SHL_R"),
|
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INST("0011100-01001---", Id::SHL_IMM, Type::Shift, "SHL_IMM"),
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||||
@@ -27,14 +27,14 @@ public:
|
||||
virtual void FlushAll() = 0;
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||||
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||||
/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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virtual void FlushRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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virtual void FlushRegion(VAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be invalidated
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virtual void InvalidateRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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virtual void InvalidateRegion(VAddr addr, u64 size) = 0;
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||||
/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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/// and invalidated
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virtual void FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0;
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/// Attempt to use a faster method to perform a display transfer with is_texture_copy = 0
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virtual bool AccelerateDisplayTransfer(const void* config) {
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@@ -25,6 +25,8 @@
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#include "video_core/renderer_opengl/renderer_opengl.h"
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#include "video_core/video_core.h"
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namespace OpenGL {
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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using PixelFormat = SurfaceParams::PixelFormat;
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using SurfaceType = SurfaceParams::SurfaceType;
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@@ -179,7 +181,7 @@ static GLShader::ProgramCode GetShaderProgramCode(Maxwell::ShaderProgram program
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auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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// Fetch program code from memory
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GLShader::ProgramCode program_code;
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GLShader::ProgramCode program_code(GLShader::MAX_PROGRAM_CODE_LENGTH);
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auto& shader_config = gpu.regs.shader_config[static_cast<size_t>(program)];
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const u64 gpu_address{gpu.regs.code_address.CodeAddress() + shader_config.offset};
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const boost::optional<VAddr> cpu_address{gpu.memory_manager.GpuToCpuAddress(gpu_address)};
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@@ -543,17 +545,17 @@ void RasterizerOpenGL::FlushAll() {
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res_cache.FlushRegion(0, Kernel::VMManager::MAX_ADDRESS);
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}
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void RasterizerOpenGL::FlushRegion(Tegra::GPUVAddr addr, u64 size) {
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void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.FlushRegion(addr, size);
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}
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void RasterizerOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
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void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.InvalidateRegion(addr, size);
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}
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void RasterizerOpenGL::FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
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void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.FlushRegion(addr, size);
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res_cache.InvalidateRegion(addr, size);
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@@ -874,3 +876,5 @@ void RasterizerOpenGL::SyncLogicOpState() {
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state.logic_op.operation = MaxwellToGL::LogicOp(regs.logic_op.operation);
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}
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||||
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||||
} // namespace OpenGL
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@@ -22,12 +22,14 @@
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#include "video_core/renderer_opengl/gl_state.h"
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#include "video_core/renderer_opengl/gl_stream_buffer.h"
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|
||||
struct ScreenInfo;
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||||
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namespace Core::Frontend {
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class EmuWindow;
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}
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||||
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||||
namespace OpenGL {
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||||
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||||
struct ScreenInfo;
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||||
|
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class RasterizerOpenGL : public VideoCore::RasterizerInterface {
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||||
public:
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||||
explicit RasterizerOpenGL(Core::Frontend::EmuWindow& renderer, ScreenInfo& info);
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||||
@@ -37,9 +39,9 @@ public:
|
||||
void Clear() override;
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||||
void NotifyMaxwellRegisterChanged(u32 method) override;
|
||||
void FlushAll() override;
|
||||
void FlushRegion(Tegra::GPUVAddr addr, u64 size) override;
|
||||
void InvalidateRegion(Tegra::GPUVAddr addr, u64 size) override;
|
||||
void FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) override;
|
||||
void FlushRegion(VAddr addr, u64 size) override;
|
||||
void InvalidateRegion(VAddr addr, u64 size) override;
|
||||
void FlushAndInvalidateRegion(VAddr addr, u64 size) override;
|
||||
bool AccelerateDisplayTransfer(const void* config) override;
|
||||
bool AccelerateTextureCopy(const void* config) override;
|
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bool AccelerateFill(const void* config) override;
|
||||
@@ -184,3 +186,5 @@ private:
|
||||
enum class AccelDraw { Disabled, Arrays, Indexed };
|
||||
AccelDraw accelerate_draw = AccelDraw::Disabled;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -19,6 +19,8 @@
|
||||
#include "video_core/textures/decoders.h"
|
||||
#include "video_core/utils.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
using SurfaceType = SurfaceParams::SurfaceType;
|
||||
using PixelFormat = SurfaceParams::PixelFormat;
|
||||
using ComponentType = SurfaceParams::ComponentType;
|
||||
@@ -33,9 +35,9 @@ struct FormatTuple {
|
||||
|
||||
/*static*/ SurfaceParams SurfaceParams::CreateForTexture(
|
||||
const Tegra::Texture::FullTextureInfo& config) {
|
||||
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
SurfaceParams params{};
|
||||
params.addr = config.tic.Address();
|
||||
params.cpu_addr = *gpu.memory_manager->GpuToCpuAddress(config.tic.Address());
|
||||
params.is_tiled = config.tic.IsTiled();
|
||||
params.block_height = params.is_tiled ? config.tic.BlockHeight() : 0,
|
||||
params.pixel_format =
|
||||
@@ -53,9 +55,9 @@ struct FormatTuple {
|
||||
|
||||
/*static*/ SurfaceParams SurfaceParams::CreateForFramebuffer(
|
||||
const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config) {
|
||||
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
SurfaceParams params{};
|
||||
params.addr = config.Address();
|
||||
params.cpu_addr = *gpu.memory_manager->GpuToCpuAddress(config.Address());
|
||||
params.is_tiled = true;
|
||||
params.block_height = Tegra::Texture::TICEntry::DefaultBlockHeight;
|
||||
params.pixel_format = PixelFormatFromRenderTargetFormat(config.format);
|
||||
@@ -73,9 +75,9 @@ struct FormatTuple {
|
||||
/*static*/ SurfaceParams SurfaceParams::CreateForDepthBuffer(u32 zeta_width, u32 zeta_height,
|
||||
Tegra::GPUVAddr zeta_address,
|
||||
Tegra::DepthFormat format) {
|
||||
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
SurfaceParams params{};
|
||||
params.addr = zeta_address;
|
||||
params.cpu_addr = *gpu.memory_manager->GpuToCpuAddress(zeta_address);
|
||||
params.is_tiled = true;
|
||||
params.block_height = Tegra::Texture::TICEntry::DefaultBlockHeight;
|
||||
params.pixel_format = PixelFormatFromDepthFormat(format);
|
||||
@@ -165,11 +167,6 @@ static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType
|
||||
return format;
|
||||
}
|
||||
|
||||
VAddr SurfaceParams::GetCpuAddr() const {
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
return *gpu.memory_manager->GpuToCpuAddress(addr);
|
||||
}
|
||||
|
||||
static bool IsPixelFormatASTC(PixelFormat format) {
|
||||
switch (format) {
|
||||
case PixelFormat::ASTC_2D_4X4:
|
||||
@@ -214,33 +211,28 @@ static bool IsFormatBCn(PixelFormat format) {
|
||||
}
|
||||
|
||||
template <bool morton_to_gl, PixelFormat format>
|
||||
void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_buffer,
|
||||
Tegra::GPUVAddr addr) {
|
||||
void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_buffer, VAddr addr) {
|
||||
constexpr u32 bytes_per_pixel = SurfaceParams::GetFormatBpp(format) / CHAR_BIT;
|
||||
constexpr u32 gl_bytes_per_pixel = CachedSurface::GetGLBytesPerPixel(format);
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
|
||||
if (morton_to_gl) {
|
||||
// With the BCn formats (DXT and DXN), each 4x4 tile is swizzled instead of just individual
|
||||
// pixel values.
|
||||
const u32 tile_size{IsFormatBCn(format) ? 4U : 1U};
|
||||
const std::vector<u8> data =
|
||||
Tegra::Texture::UnswizzleTexture(*gpu.memory_manager->GpuToCpuAddress(addr), tile_size,
|
||||
bytes_per_pixel, stride, height, block_height);
|
||||
const std::vector<u8> data = Tegra::Texture::UnswizzleTexture(
|
||||
addr, tile_size, bytes_per_pixel, stride, height, block_height);
|
||||
const size_t size_to_copy{std::min(gl_buffer.size(), data.size())};
|
||||
gl_buffer.assign(data.begin(), data.begin() + size_to_copy);
|
||||
} else {
|
||||
// TODO(bunnei): Assumes the default rendering GOB size of 16 (128 lines). We should
|
||||
// check the configuration for this and perform more generic un/swizzle
|
||||
LOG_WARNING(Render_OpenGL, "need to use correct swizzle/GOB parameters!");
|
||||
VideoCore::MortonCopyPixels128(
|
||||
stride, height, bytes_per_pixel, gl_bytes_per_pixel,
|
||||
Memory::GetPointer(*gpu.memory_manager->GpuToCpuAddress(addr)), gl_buffer.data(),
|
||||
morton_to_gl);
|
||||
VideoCore::MortonCopyPixels128(stride, height, bytes_per_pixel, gl_bytes_per_pixel,
|
||||
Memory::GetPointer(addr), gl_buffer.data(), morton_to_gl);
|
||||
}
|
||||
}
|
||||
|
||||
static constexpr std::array<void (*)(u32, u32, u32, std::vector<u8>&, Tegra::GPUVAddr),
|
||||
static constexpr std::array<void (*)(u32, u32, u32, std::vector<u8>&, VAddr),
|
||||
SurfaceParams::MaxPixelFormat>
|
||||
morton_to_gl_fns = {
|
||||
// clang-format off
|
||||
@@ -295,7 +287,7 @@ static constexpr std::array<void (*)(u32, u32, u32, std::vector<u8>&, Tegra::GPU
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
static constexpr std::array<void (*)(u32, u32, u32, std::vector<u8>&, Tegra::GPUVAddr),
|
||||
static constexpr std::array<void (*)(u32, u32, u32, std::vector<u8>&, VAddr),
|
||||
SurfaceParams::MaxPixelFormat>
|
||||
gl_to_morton_fns = {
|
||||
// clang-format off
|
||||
@@ -530,7 +522,7 @@ MICROPROFILE_DEFINE(OpenGL_SurfaceLoad, "OpenGL", "Surface Load", MP_RGB(128, 64
|
||||
void CachedSurface::LoadGLBuffer() {
|
||||
ASSERT(params.type != SurfaceType::Fill);
|
||||
|
||||
const u8* const texture_src_data = Memory::GetPointer(params.GetCpuAddr());
|
||||
const u8* const texture_src_data = Memory::GetPointer(params.cpu_addr);
|
||||
|
||||
ASSERT(texture_src_data);
|
||||
|
||||
@@ -543,7 +535,7 @@ void CachedSurface::LoadGLBuffer() {
|
||||
gl_buffer.resize(copy_size);
|
||||
|
||||
morton_to_gl_fns[static_cast<size_t>(params.pixel_format)](
|
||||
params.width, params.block_height, params.height, gl_buffer, params.addr);
|
||||
params.width, params.block_height, params.height, gl_buffer, params.cpu_addr);
|
||||
} else {
|
||||
const u8* const texture_src_data_end = texture_src_data + copy_size;
|
||||
|
||||
@@ -555,7 +547,7 @@ void CachedSurface::LoadGLBuffer() {
|
||||
|
||||
MICROPROFILE_DEFINE(OpenGL_SurfaceFlush, "OpenGL", "Surface Flush", MP_RGB(128, 192, 64));
|
||||
void CachedSurface::FlushGLBuffer() {
|
||||
u8* const dst_buffer = Memory::GetPointer(params.GetCpuAddr());
|
||||
u8* const dst_buffer = Memory::GetPointer(params.cpu_addr);
|
||||
|
||||
ASSERT(dst_buffer);
|
||||
ASSERT(gl_buffer.size() ==
|
||||
@@ -570,7 +562,7 @@ void CachedSurface::FlushGLBuffer() {
|
||||
std::memcpy(dst_buffer, gl_buffer.data(), params.size_in_bytes);
|
||||
} else {
|
||||
gl_to_morton_fns[static_cast<size_t>(params.pixel_format)](
|
||||
params.width, params.block_height, params.height, gl_buffer, params.addr);
|
||||
params.width, params.block_height, params.height, gl_buffer, params.cpu_addr);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -754,17 +746,12 @@ void RasterizerCacheOpenGL::FlushSurface(const Surface& surface) {
|
||||
}
|
||||
|
||||
Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params, bool preserve_contents) {
|
||||
if (params.addr == 0 || params.height * params.width == 0) {
|
||||
if (params.cpu_addr == 0 || params.height * params.width == 0) {
|
||||
return {};
|
||||
}
|
||||
|
||||
const auto& gpu = Core::System::GetInstance().GPU();
|
||||
// Don't try to create any entries in the cache if the address of the texture is invalid.
|
||||
if (gpu.memory_manager->GpuToCpuAddress(params.addr) == boost::none)
|
||||
return {};
|
||||
|
||||
// Look up surface in the cache based on address
|
||||
const auto& search{surface_cache.find(params.addr)};
|
||||
const auto& search{surface_cache.find(params.cpu_addr)};
|
||||
Surface surface;
|
||||
if (search != surface_cache.end()) {
|
||||
surface = search->second;
|
||||
@@ -797,9 +784,6 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
|
||||
const SurfaceParams& new_params) {
|
||||
// Verify surface is compatible for blitting
|
||||
const auto& params{surface->GetSurfaceParams()};
|
||||
ASSERT(params.type == new_params.type);
|
||||
ASSERT_MSG(params.GetCompressionFactor(params.pixel_format) == 1,
|
||||
"Compressed texture reinterpretation is not supported");
|
||||
|
||||
// Create a new surface with the new parameters, and blit the previous surface to it
|
||||
Surface new_surface{std::make_shared<CachedSurface>(new_params)};
|
||||
@@ -816,9 +800,12 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
|
||||
|
||||
glBindBuffer(GL_PIXEL_PACK_BUFFER, pbo.handle);
|
||||
glBufferData(GL_PIXEL_PACK_BUFFER, buffer_size, nullptr, GL_STREAM_DRAW_ARB);
|
||||
glGetTextureImage(surface->Texture().handle, 0, source_format.format, source_format.type,
|
||||
params.SizeInBytes(), nullptr);
|
||||
|
||||
if (source_format.compressed) {
|
||||
glGetCompressedTextureImage(surface->Texture().handle, 0, params.SizeInBytes(), nullptr);
|
||||
} else {
|
||||
glGetTextureImage(surface->Texture().handle, 0, source_format.format, source_format.type,
|
||||
params.SizeInBytes(), nullptr);
|
||||
}
|
||||
// If the new texture is bigger than the previous one, we need to fill in the rest with data
|
||||
// from the CPU.
|
||||
if (params.SizeInBytes() < new_params.SizeInBytes()) {
|
||||
@@ -832,10 +819,8 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
|
||||
"reinterpretation but the texture is tiled.");
|
||||
}
|
||||
size_t remaining_size = new_params.SizeInBytes() - params.SizeInBytes();
|
||||
auto address = Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(
|
||||
new_params.addr + params.SizeInBytes());
|
||||
std::vector<u8> data(remaining_size);
|
||||
Memory::ReadBlock(*address, data.data(), data.size());
|
||||
Memory::ReadBlock(new_params.cpu_addr + params.SizeInBytes(), data.data(), data.size());
|
||||
glBufferSubData(GL_PIXEL_PACK_BUFFER, params.SizeInBytes(), remaining_size, data.data());
|
||||
}
|
||||
|
||||
@@ -844,9 +829,32 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
|
||||
const auto& dest_rect{new_params.GetRect()};
|
||||
|
||||
glBindBuffer(GL_PIXEL_UNPACK_BUFFER, pbo.handle);
|
||||
glTextureSubImage2D(
|
||||
new_surface->Texture().handle, 0, 0, 0, static_cast<GLsizei>(dest_rect.GetWidth()),
|
||||
static_cast<GLsizei>(dest_rect.GetHeight()), dest_format.format, dest_format.type, nullptr);
|
||||
if (dest_format.compressed) {
|
||||
OpenGLState cur_state = OpenGLState::GetCurState();
|
||||
|
||||
GLuint old_tex = cur_state.texture_units[0].texture_2d;
|
||||
cur_state.texture_units[0].texture_2d = new_surface->Texture().handle;
|
||||
cur_state.Apply();
|
||||
|
||||
// Ensure no bad interactions with GL_UNPACK_ALIGNMENT
|
||||
ASSERT(new_params.width * CachedSurface::GetGLBytesPerPixel(new_params.pixel_format) % 4 ==
|
||||
0);
|
||||
glPixelStorei(GL_UNPACK_ROW_LENGTH, static_cast<GLint>(params.width));
|
||||
glActiveTexture(GL_TEXTURE0);
|
||||
glCompressedTexImage2D(GL_TEXTURE_2D, 0, dest_format.internal_format,
|
||||
static_cast<GLsizei>(dest_rect.GetWidth()),
|
||||
static_cast<GLsizei>(dest_rect.GetHeight()), 0,
|
||||
static_cast<GLsizei>(new_params.SizeInBytes()), nullptr);
|
||||
glPixelStorei(GL_UNPACK_ROW_LENGTH, 0);
|
||||
|
||||
cur_state.texture_units[0].texture_2d = old_tex;
|
||||
cur_state.Apply();
|
||||
} else {
|
||||
glTextureSubImage2D(new_surface->Texture().handle, 0, 0, 0,
|
||||
static_cast<GLsizei>(dest_rect.GetWidth()),
|
||||
static_cast<GLsizei>(dest_rect.GetHeight()), dest_format.format,
|
||||
dest_format.type, nullptr);
|
||||
}
|
||||
glBindBuffer(GL_PIXEL_UNPACK_BUFFER, 0);
|
||||
|
||||
pbo.Release();
|
||||
@@ -868,9 +876,8 @@ Surface RasterizerCacheOpenGL::TryFindFramebufferSurface(VAddr cpu_addr) const {
|
||||
std::vector<Surface> surfaces;
|
||||
for (const auto& surface : surface_cache) {
|
||||
const auto& params = surface.second->GetSurfaceParams();
|
||||
const VAddr surface_cpu_addr = params.GetCpuAddr();
|
||||
if (cpu_addr >= surface_cpu_addr && cpu_addr < (surface_cpu_addr + params.size_in_bytes)) {
|
||||
ASSERT_MSG(cpu_addr == surface_cpu_addr, "overlapping surfaces are unsupported");
|
||||
if (cpu_addr >= params.cpu_addr && cpu_addr < (params.cpu_addr + params.size_in_bytes)) {
|
||||
ASSERT_MSG(cpu_addr == params.cpu_addr, "overlapping surfaces are unsupported");
|
||||
surfaces.push_back(surface.second);
|
||||
}
|
||||
}
|
||||
@@ -884,13 +891,13 @@ Surface RasterizerCacheOpenGL::TryFindFramebufferSurface(VAddr cpu_addr) const {
|
||||
return surfaces[0];
|
||||
}
|
||||
|
||||
void RasterizerCacheOpenGL::FlushRegion(Tegra::GPUVAddr /*addr*/, size_t /*size*/) {
|
||||
void RasterizerCacheOpenGL::FlushRegion(VAddr /*addr*/, size_t /*size*/) {
|
||||
// TODO(bunnei): This is unused in the current implementation of the rasterizer cache. We should
|
||||
// probably implement this in the future, but for now, the `use_accurate_framebufers` setting
|
||||
// can be used to always flush.
|
||||
}
|
||||
|
||||
void RasterizerCacheOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, size_t size) {
|
||||
void RasterizerCacheOpenGL::InvalidateRegion(VAddr addr, size_t size) {
|
||||
for (auto iter = surface_cache.cbegin(); iter != surface_cache.cend();) {
|
||||
const auto& surface{iter->second};
|
||||
const auto& params{surface->GetSurfaceParams()};
|
||||
@@ -905,27 +912,27 @@ void RasterizerCacheOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, size_t size)
|
||||
|
||||
void RasterizerCacheOpenGL::RegisterSurface(const Surface& surface) {
|
||||
const auto& params{surface->GetSurfaceParams()};
|
||||
const auto& search{surface_cache.find(params.addr)};
|
||||
const auto& search{surface_cache.find(params.cpu_addr)};
|
||||
|
||||
if (search != surface_cache.end()) {
|
||||
// Registered already
|
||||
return;
|
||||
}
|
||||
|
||||
surface_cache[params.addr] = surface;
|
||||
UpdatePagesCachedCount(params.addr, params.size_in_bytes, 1);
|
||||
surface_cache[params.cpu_addr] = surface;
|
||||
UpdatePagesCachedCount(params.cpu_addr, params.size_in_bytes, 1);
|
||||
}
|
||||
|
||||
void RasterizerCacheOpenGL::UnregisterSurface(const Surface& surface) {
|
||||
const auto& params{surface->GetSurfaceParams()};
|
||||
const auto& search{surface_cache.find(params.addr)};
|
||||
const auto& search{surface_cache.find(params.cpu_addr)};
|
||||
|
||||
if (search == surface_cache.end()) {
|
||||
// Unregistered already
|
||||
return;
|
||||
}
|
||||
|
||||
UpdatePagesCachedCount(params.addr, params.size_in_bytes, -1);
|
||||
UpdatePagesCachedCount(params.cpu_addr, params.size_in_bytes, -1);
|
||||
surface_cache.erase(search);
|
||||
}
|
||||
|
||||
@@ -934,10 +941,10 @@ constexpr auto RangeFromInterval(Map& map, const Interval& interval) {
|
||||
return boost::make_iterator_range(map.equal_range(interval));
|
||||
}
|
||||
|
||||
void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta) {
|
||||
const u64 num_pages = ((addr + size - 1) >> Tegra::MemoryManager::PAGE_BITS) -
|
||||
(addr >> Tegra::MemoryManager::PAGE_BITS) + 1;
|
||||
const u64 page_start = addr >> Tegra::MemoryManager::PAGE_BITS;
|
||||
void RasterizerCacheOpenGL::UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {
|
||||
const u64 num_pages =
|
||||
((addr + size - 1) >> Memory::PAGE_BITS) - (addr >> Memory::PAGE_BITS) + 1;
|
||||
const u64 page_start = addr >> Memory::PAGE_BITS;
|
||||
const u64 page_end = page_start + num_pages;
|
||||
|
||||
// Interval maps will erase segments if count reaches 0, so if delta is negative we have to
|
||||
@@ -950,10 +957,8 @@ void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 siz
|
||||
const auto interval = pair.first & pages_interval;
|
||||
const int count = pair.second;
|
||||
|
||||
const Tegra::GPUVAddr interval_start_addr = boost::icl::first(interval)
|
||||
<< Tegra::MemoryManager::PAGE_BITS;
|
||||
const Tegra::GPUVAddr interval_end_addr = boost::icl::last_next(interval)
|
||||
<< Tegra::MemoryManager::PAGE_BITS;
|
||||
const VAddr interval_start_addr = boost::icl::first(interval) << Memory::PAGE_BITS;
|
||||
const VAddr interval_end_addr = boost::icl::last_next(interval) << Memory::PAGE_BITS;
|
||||
const u64 interval_size = interval_end_addr - interval_start_addr;
|
||||
|
||||
if (delta > 0 && count == delta)
|
||||
@@ -967,3 +972,5 @@ void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 siz
|
||||
if (delta < 0)
|
||||
cached_pages.add({pages_interval, delta});
|
||||
}
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -16,6 +16,8 @@
|
||||
#include "video_core/renderer_opengl/gl_resource_manager.h"
|
||||
#include "video_core/textures/texture.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
class CachedSurface;
|
||||
using Surface = std::shared_ptr<CachedSurface>;
|
||||
using SurfaceSurfaceRect_Tuple = std::tuple<Surface, Surface, MathUtil::Rectangle<u32>>;
|
||||
@@ -626,12 +628,9 @@ struct SurfaceParams {
|
||||
GetFormatBpp(pixel_format) / CHAR_BIT;
|
||||
}
|
||||
|
||||
/// Returns the CPU virtual address for this surface
|
||||
VAddr GetCpuAddr() const;
|
||||
|
||||
/// Returns true if the specified region overlaps with this surface's region in Switch memory
|
||||
bool IsOverlappingRegion(Tegra::GPUVAddr region_addr, size_t region_size) const {
|
||||
return addr <= (region_addr + region_size) && region_addr <= (addr + size_in_bytes);
|
||||
bool IsOverlappingRegion(VAddr region_addr, size_t region_size) const {
|
||||
return cpu_addr <= (region_addr + region_size) && region_addr <= (cpu_addr + size_in_bytes);
|
||||
}
|
||||
|
||||
/// Creates SurfaceParams from a texture configuration
|
||||
@@ -647,9 +646,9 @@ struct SurfaceParams {
|
||||
Tegra::DepthFormat format);
|
||||
|
||||
bool operator==(const SurfaceParams& other) const {
|
||||
return std::tie(addr, is_tiled, block_height, pixel_format, component_type, type, width,
|
||||
return std::tie(cpu_addr, is_tiled, block_height, pixel_format, component_type, type, width,
|
||||
height, unaligned_height, size_in_bytes) ==
|
||||
std::tie(other.addr, other.is_tiled, other.block_height, other.pixel_format,
|
||||
std::tie(other.cpu_addr, other.is_tiled, other.block_height, other.pixel_format,
|
||||
other.component_type, other.type, other.width, other.height,
|
||||
other.unaligned_height, other.size_in_bytes);
|
||||
}
|
||||
@@ -664,7 +663,7 @@ struct SurfaceParams {
|
||||
std::tie(other.pixel_format, other.type, other.cache_width, other.cache_height);
|
||||
}
|
||||
|
||||
Tegra::GPUVAddr addr;
|
||||
VAddr cpu_addr;
|
||||
bool is_tiled;
|
||||
u32 block_height;
|
||||
PixelFormat pixel_format;
|
||||
@@ -732,10 +731,10 @@ public:
|
||||
Surface TryFindFramebufferSurface(VAddr cpu_addr) const;
|
||||
|
||||
/// Write any cached resources overlapping the region back to memory (if dirty)
|
||||
void FlushRegion(Tegra::GPUVAddr addr, size_t size);
|
||||
void FlushRegion(VAddr addr, size_t size);
|
||||
|
||||
/// Mark the specified region as being invalidated
|
||||
void InvalidateRegion(Tegra::GPUVAddr addr, size_t size);
|
||||
void InvalidateRegion(VAddr addr, size_t size);
|
||||
|
||||
private:
|
||||
void LoadSurface(const Surface& surface);
|
||||
@@ -751,11 +750,13 @@ private:
|
||||
void UnregisterSurface(const Surface& surface);
|
||||
|
||||
/// Increase/decrease the number of surface in pages touching the specified region
|
||||
void UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta);
|
||||
void UpdatePagesCachedCount(VAddr addr, u64 size, int delta);
|
||||
|
||||
std::unordered_map<Tegra::GPUVAddr, Surface> surface_cache;
|
||||
std::unordered_map<VAddr, Surface> surface_cache;
|
||||
PageMap cached_pages;
|
||||
|
||||
OGLFramebuffer read_framebuffer;
|
||||
OGLFramebuffer draw_framebuffer;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
#include "video_core/renderer_opengl/gl_shader_util.h"
|
||||
#include "video_core/renderer_opengl/gl_state.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
class OGLTexture : private NonCopyable {
|
||||
public:
|
||||
OGLTexture() = default;
|
||||
@@ -331,3 +333,5 @@ public:
|
||||
|
||||
GLuint handle = 0;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -15,7 +15,7 @@
|
||||
#include "video_core/renderer_opengl/gl_rasterizer.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_decompiler.h"
|
||||
|
||||
namespace GLShader::Decompiler {
|
||||
namespace OpenGL::GLShader::Decompiler {
|
||||
|
||||
using Tegra::Shader::Attribute;
|
||||
using Tegra::Shader::Instruction;
|
||||
@@ -849,6 +849,33 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
void WriteLop3Instruction(Register dest, const std::string& op_a, const std::string& op_b,
|
||||
const std::string& op_c, const std::string& imm_lut) {
|
||||
if (dest == Tegra::Shader::Register::ZeroIndex) {
|
||||
return;
|
||||
}
|
||||
|
||||
static constexpr std::array<const char*, 32> shift_amounts = {
|
||||
"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
|
||||
"11", "12", "13", "14", "15", "16", "17", "18", "19", "20", "21",
|
||||
"22", "23", "24", "25", "26", "27", "28", "29", "30", "31"};
|
||||
|
||||
std::string result;
|
||||
result += '(';
|
||||
|
||||
for (size_t i = 0; i < shift_amounts.size(); ++i) {
|
||||
if (i)
|
||||
result += '|';
|
||||
result += "(((" + imm_lut + " >> (((" + op_c + " >> " + shift_amounts[i] +
|
||||
") & 1) | ((" + op_b + " >> " + shift_amounts[i] + ") & 1) << 1 | ((" + op_a +
|
||||
" >> " + shift_amounts[i] + ") & 1) << 2)) & 1) << " + shift_amounts[i] + ")";
|
||||
}
|
||||
|
||||
result += ')';
|
||||
|
||||
regs.SetRegisterToInteger(dest, true, 0, result, 1, 1);
|
||||
}
|
||||
|
||||
void WriteTexsInstruction(const Instruction& instr, const std::string& coord,
|
||||
const std::string& texture) {
|
||||
// Add an extra scope and declare the texture coords inside to prevent
|
||||
@@ -1297,6 +1324,20 @@ private:
|
||||
instr.alu.lop.pred_result_mode, instr.alu.lop.pred48);
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::LOP3_C:
|
||||
case OpCode::Id::LOP3_R:
|
||||
case OpCode::Id::LOP3_IMM: {
|
||||
std::string op_c = regs.GetRegisterAsInteger(instr.gpr39);
|
||||
std::string lut;
|
||||
if (opcode->GetId() == OpCode::Id::LOP3_R) {
|
||||
lut = '(' + std::to_string(instr.alu.lop3.GetImmLut28()) + ')';
|
||||
} else {
|
||||
lut = '(' + std::to_string(instr.alu.lop3.GetImmLut48()) + ')';
|
||||
}
|
||||
|
||||
WriteLop3Instruction(instr.gpr0, op_a, op_b, op_c, lut);
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::IMNMX_C:
|
||||
case OpCode::Id::IMNMX_R:
|
||||
case OpCode::Id::IMNMX_IMM: {
|
||||
@@ -2176,4 +2217,4 @@ boost::optional<ProgramResult> DecompileProgram(const ProgramCode& program_code,
|
||||
return boost::none;
|
||||
}
|
||||
|
||||
} // namespace GLShader::Decompiler
|
||||
} // namespace OpenGL::GLShader::Decompiler
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
#include "video_core/engines/maxwell_3d.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_gen.h"
|
||||
|
||||
namespace GLShader::Decompiler {
|
||||
namespace OpenGL::GLShader::Decompiler {
|
||||
|
||||
using Tegra::Engines::Maxwell3D;
|
||||
|
||||
@@ -22,4 +22,4 @@ boost::optional<ProgramResult> DecompileProgram(const ProgramCode& program_code,
|
||||
Maxwell3D::Regs::ShaderStage stage,
|
||||
const std::string& suffix);
|
||||
|
||||
} // namespace GLShader::Decompiler
|
||||
} // namespace OpenGL::GLShader::Decompiler
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
#include "video_core/renderer_opengl/gl_shader_decompiler.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_gen.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
using Tegra::Engines::Maxwell3D;
|
||||
|
||||
@@ -103,4 +103,4 @@ void main() {
|
||||
return {out, program.second};
|
||||
}
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
@@ -9,14 +9,14 @@
|
||||
#include <type_traits>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
#include <boost/functional/hash.hpp>
|
||||
#include "common/common_types.h"
|
||||
#include "common/hash.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
constexpr size_t MAX_PROGRAM_CODE_LENGTH{0x1000};
|
||||
|
||||
using ProgramCode = std::array<u64, MAX_PROGRAM_CODE_LENGTH>;
|
||||
using ProgramCode = std::vector<u64>;
|
||||
|
||||
class ConstBufferEntry {
|
||||
using Maxwell = Tegra::Engines::Maxwell3D::Regs;
|
||||
@@ -115,8 +115,8 @@ struct ShaderEntries {
|
||||
using ProgramResult = std::pair<std::string, ShaderEntries>;
|
||||
|
||||
struct ShaderSetup {
|
||||
ShaderSetup(const ProgramCode& program_code) {
|
||||
program.code = program_code;
|
||||
explicit ShaderSetup(ProgramCode program_code) {
|
||||
program.code = std::move(program_code);
|
||||
}
|
||||
|
||||
struct {
|
||||
@@ -135,8 +135,8 @@ struct ShaderSetup {
|
||||
}
|
||||
|
||||
/// Used in scenarios where we have a dual vertex shaders
|
||||
void SetProgramB(const ProgramCode& program_b) {
|
||||
program.code_b = program_b;
|
||||
void SetProgramB(ProgramCode program_b) {
|
||||
program.code_b = std::move(program_b);
|
||||
has_program_b = true;
|
||||
}
|
||||
|
||||
@@ -146,13 +146,18 @@ struct ShaderSetup {
|
||||
|
||||
private:
|
||||
u64 GetNewHash() const {
|
||||
size_t hash = 0;
|
||||
|
||||
const u64 hash_a = Common::ComputeHash64(program.code.data(), program.code.size());
|
||||
boost::hash_combine(hash, hash_a);
|
||||
|
||||
if (has_program_b) {
|
||||
// Compute hash over dual shader programs
|
||||
return Common::ComputeHash64(&program, sizeof(program));
|
||||
} else {
|
||||
// Compute hash over a single shader program
|
||||
return Common::ComputeHash64(&program.code, program.code.size());
|
||||
const u64 hash_b = Common::ComputeHash64(program.code_b.data(), program.code_b.size());
|
||||
boost::hash_combine(hash, hash_b);
|
||||
}
|
||||
|
||||
return hash;
|
||||
}
|
||||
|
||||
u64 program_code_hash{};
|
||||
@@ -191,20 +196,20 @@ ProgramResult GenerateVertexShader(const ShaderSetup& setup, const MaxwellVSConf
|
||||
*/
|
||||
ProgramResult GenerateFragmentShader(const ShaderSetup& setup, const MaxwellFSConfig& config);
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
namespace std {
|
||||
|
||||
template <>
|
||||
struct hash<GLShader::MaxwellVSConfig> {
|
||||
size_t operator()(const GLShader::MaxwellVSConfig& k) const {
|
||||
struct hash<OpenGL::GLShader::MaxwellVSConfig> {
|
||||
size_t operator()(const OpenGL::GLShader::MaxwellVSConfig& k) const {
|
||||
return k.Hash();
|
||||
}
|
||||
};
|
||||
|
||||
template <>
|
||||
struct hash<GLShader::MaxwellFSConfig> {
|
||||
size_t operator()(const GLShader::MaxwellFSConfig& k) const {
|
||||
struct hash<OpenGL::GLShader::MaxwellFSConfig> {
|
||||
size_t operator()(const OpenGL::GLShader::MaxwellFSConfig& k) const {
|
||||
return k.Hash();
|
||||
}
|
||||
};
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
#include "video_core/engines/maxwell_3d.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_manager.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
namespace Impl {
|
||||
static void SetShaderUniformBlockBinding(GLuint shader, const char* name,
|
||||
@@ -49,4 +49,4 @@ void MaxwellUniformData::SetFromRegs(const Maxwell3D::State::ShaderStageInfo& sh
|
||||
instance_id[0] = state.current_instance;
|
||||
}
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
#include "video_core/renderer_opengl/gl_shader_gen.h"
|
||||
#include "video_core/renderer_opengl/maxwell_to_gl.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
/// Number of OpenGL texture samplers that can be used in the fragment shader
|
||||
static constexpr size_t NumTextureSamplers = 32;
|
||||
@@ -171,4 +171,4 @@ private:
|
||||
OGLPipeline pipeline;
|
||||
};
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#include "common/logging/log.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_util.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
GLuint LoadShader(const char* source, GLenum type) {
|
||||
const char* debug_type;
|
||||
@@ -47,4 +47,4 @@ GLuint LoadShader(const char* source, GLenum type) {
|
||||
return shader_id;
|
||||
}
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
|
||||
namespace GLShader {
|
||||
namespace OpenGL::GLShader {
|
||||
|
||||
/**
|
||||
* Utility function to log the source code of a list of shaders.
|
||||
@@ -89,4 +89,4 @@ GLuint LoadProgram(bool separable_program, T... shaders) {
|
||||
return program_id;
|
||||
}
|
||||
|
||||
} // namespace GLShader
|
||||
} // namespace OpenGL::GLShader
|
||||
|
||||
@@ -7,6 +7,8 @@
|
||||
#include "common/logging/log.h"
|
||||
#include "video_core/renderer_opengl/gl_state.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
OpenGLState OpenGLState::cur_state;
|
||||
|
||||
OpenGLState::OpenGLState() {
|
||||
@@ -338,3 +340,5 @@ OpenGLState& OpenGLState::ResetFramebuffer(GLuint handle) {
|
||||
}
|
||||
return *this;
|
||||
}
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -9,6 +9,8 @@
|
||||
|
||||
#include "video_core/engines/maxwell_3d.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
using Regs = Tegra::Engines::Maxwell3D::Regs;
|
||||
|
||||
namespace TextureUnits {
|
||||
@@ -163,3 +165,5 @@ public:
|
||||
private:
|
||||
static OpenGLState cur_state;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -9,6 +9,8 @@
|
||||
#include "video_core/renderer_opengl/gl_state.h"
|
||||
#include "video_core/renderer_opengl/gl_stream_buffer.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
OGLStreamBuffer::OGLStreamBuffer(GLenum target, GLsizeiptr size, bool prefer_coherent)
|
||||
: gl_target(target), buffer_size(size) {
|
||||
gl_buffer.Create();
|
||||
@@ -97,3 +99,5 @@ void OGLStreamBuffer::Unmap(GLsizeiptr size) {
|
||||
|
||||
buffer_pos += size;
|
||||
}
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -9,6 +9,8 @@
|
||||
#include "common/common_types.h"
|
||||
#include "video_core/renderer_opengl/gl_resource_manager.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
class OGLStreamBuffer : private NonCopyable {
|
||||
public:
|
||||
explicit OGLStreamBuffer(GLenum target, GLsizeiptr size, bool prefer_coherent = false);
|
||||
@@ -42,3 +44,5 @@ private:
|
||||
GLsizeiptr mapped_size = 0;
|
||||
u8* mapped_ptr = nullptr;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
#include "common/logging/log.h"
|
||||
#include "video_core/engines/maxwell_3d.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
using GLvec2 = std::array<GLfloat, 2>;
|
||||
using GLvec3 = std::array<GLfloat, 3>;
|
||||
using GLvec4 = std::array<GLfloat, 4>;
|
||||
@@ -360,3 +362,4 @@ inline GLenum LogicOp(Maxwell::LogicOperation operation) {
|
||||
}
|
||||
|
||||
} // namespace MaxwellToGL
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -20,6 +20,8 @@
|
||||
#include "video_core/renderer_opengl/renderer_opengl.h"
|
||||
#include "video_core/utils.h"
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
static const char vertex_shader[] = R"(
|
||||
#version 150 core
|
||||
|
||||
@@ -476,3 +478,5 @@ bool RendererOpenGL::Init() {
|
||||
|
||||
/// Shutdown the renderer
|
||||
void RendererOpenGL::ShutDown() {}
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -16,6 +16,8 @@ namespace Core::Frontend {
|
||||
class EmuWindow;
|
||||
}
|
||||
|
||||
namespace OpenGL {
|
||||
|
||||
/// Structure used for storing information about the textures for the Switch screen
|
||||
struct TextureInfo {
|
||||
OGLTexture resource;
|
||||
@@ -98,3 +100,5 @@ private:
|
||||
Tegra::FramebufferConfig::TransformFlags framebuffer_transform_flags;
|
||||
MathUtil::Rectangle<int> framebuffer_crop_rect;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
namespace VideoCore {
|
||||
|
||||
std::unique_ptr<RendererBase> CreateRenderer(Core::Frontend::EmuWindow& emu_window) {
|
||||
return std::make_unique<RendererOpenGL>(emu_window);
|
||||
return std::make_unique<OpenGL::RendererOpenGL>(emu_window);
|
||||
}
|
||||
|
||||
} // namespace VideoCore
|
||||
|
||||
@@ -29,24 +29,6 @@
|
||||
</property>
|
||||
<layout class="QGridLayout" name="gridLayout_6">
|
||||
<item row="0" column="0">
|
||||
<layout class="QVBoxLayout" name="buttonMiscPlusVerticalLayout">
|
||||
<item>
|
||||
<widget class="QLabel" name="labelPlus">
|
||||
<property name="text">
|
||||
<string>Plus:</string>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QPushButton" name="buttonPlus">
|
||||
<property name="text">
|
||||
<string/>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
</layout>
|
||||
</item>
|
||||
<item row="0" column="1">
|
||||
<layout class="QVBoxLayout" name="buttonMiscMinusVerticalLayout">
|
||||
<item>
|
||||
<widget class="QLabel" name="labelMinus">
|
||||
@@ -64,6 +46,24 @@
|
||||
</item>
|
||||
</layout>
|
||||
</item>
|
||||
<item row="0" column="1">
|
||||
<layout class="QVBoxLayout" name="buttonMiscPlusVerticalLayout">
|
||||
<item>
|
||||
<widget class="QLabel" name="labelPlus">
|
||||
<property name="text">
|
||||
<string>Plus:</string>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QPushButton" name="buttonPlus">
|
||||
<property name="text">
|
||||
<string/>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
</layout>
|
||||
</item>
|
||||
<item row="1" column="0">
|
||||
<layout class="QVBoxLayout" name="buttonMiscHomeVerticalLayout">
|
||||
<item>
|
||||
|
||||
Reference in New Issue
Block a user