Automatic descriptor swapping for ioctls, fixed nvgpu_gpu_get_tpc_masks_args being incorrect size
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@@ -88,6 +88,7 @@ private:
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not present. This parameter is ignored if
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mask_buf_size is 0. */
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u64_le mask_buf_addr;
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u64_le unk; // Nintendo add this?
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};
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struct active_slot_mask {
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@@ -31,17 +31,24 @@ void NVDRV::Ioctl(Kernel::HLERequestContext& ctx) {
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u32 fd = rp.Pop<u32>();
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u32 command = rp.Pop<u32>();
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auto input_buffer = ctx.BufferDescriptorA()[0];
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auto output_buffer = ctx.BufferDescriptorB()[0];
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std::vector<u8> input(input_buffer.Size());
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std::vector<u8> output(output_buffer.Size());
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Memory::ReadBlock(input_buffer.Address(), input.data(), input_buffer.Size());
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u32 nv_result = nvdrv->Ioctl(fd, command, input, output);
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Memory::WriteBlock(output_buffer.Address(), output.data(), output_buffer.Size());
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u32 nv_result = 0x0;
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if (ctx.BufferDescriptorA()[0].Size() != 0) {
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auto input_buffer = ctx.BufferDescriptorA()[0];
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auto output_buffer = ctx.BufferDescriptorB()[0];
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std::vector<u8> input(input_buffer.Size());
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std::vector<u8> output(output_buffer.Size());
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Memory::ReadBlock(input_buffer.Address(), input.data(), input_buffer.Size());
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nv_result = nvdrv->Ioctl(fd, command, input, output);
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Memory::WriteBlock(output_buffer.Address(), output.data(), output_buffer.Size());
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} else {
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auto input_buffer = ctx.BufferDescriptorX()[0];
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auto output_buffer = ctx.BufferDescriptorC()[0];
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std::vector<u8> input(input_buffer.size);
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std::vector<u8> output(output_buffer.size);
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Memory::ReadBlock(input_buffer.Address(), input.data(), input_buffer.size);
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nv_result = nvdrv->Ioctl(fd, command, input, output);
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Memory::WriteBlock(output_buffer.Address(), output.data(), output_buffer.size);
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}
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IPC::ResponseBuilder rb{ctx, 3};
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rb.Push(RESULT_SUCCESS);
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