Merge branch 'master' of https://github.com/Hedges/yuzu
This commit is contained in:
@@ -144,6 +144,7 @@ static u32 latest_signal = 0;
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||||
static bool memory_break = false;
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static Kernel::Thread* current_thread = nullptr;
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static int thread_id = -1;
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// Binding to a port within the reserved ports range (0-1023) requires root permissions,
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// so default to a port outside of that range.
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@@ -562,11 +563,9 @@ static void HandleQuery() {
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/// Handle set thread command from gdb client.
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static void HandleSetThread() {
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if (memcmp(command_buffer, "Hc", 2) == 0 || memcmp(command_buffer, "Hg", 2) == 0) {
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int thread_id = -1;
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thread_id = -1;
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if (command_buffer[2] != '-') {
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thread_id = static_cast<int>(HexToInt(
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command_buffer + 2,
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command_length - 2 /*strlen(reinterpret_cast<char*>(command_buffer) + 2)*/));
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thread_id = static_cast<int>(HexToInt(command_buffer + 2, command_length - 2));
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}
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if (thread_id >= 1) {
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current_thread = FindThreadById(thread_id);
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@@ -585,9 +584,7 @@ static void HandleSetThread() {
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/// Handle thread alive command from gdb client.
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static void HandleThreadAlive() {
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int thread_id = static_cast<int>(
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HexToInt(command_buffer + 1,
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command_length - 1 /*strlen(reinterpret_cast<char*>(command_buffer) + 1)*/));
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int thread_id = static_cast<int>(HexToInt(command_buffer + 1, command_length - 1));
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if (thread_id == 0) {
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thread_id = 1;
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}
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@@ -1192,7 +1189,9 @@ void SetCpuStepFlag(bool is_step) {
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}
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void SendTrap(Kernel::Thread* thread, int trap) {
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if (send_trap) {
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//NGLOG_ERROR(Debug_GDBStub, "SendTrap {} {} {} {}", thread->GetThreadId(), thread_id, trap,
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// send_trap);
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if (send_trap && (thread == current_thread)) {
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send_trap = false;
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SendSignal(thread, trap);
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}
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@@ -561,7 +561,7 @@ IApplicationFunctions::IApplicationFunctions() : ServiceFramework("IApplicationF
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{32, nullptr, "BeginBlockingHomeButton"},
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{33, nullptr, "EndBlockingHomeButton"},
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{40, &IApplicationFunctions::NotifyRunning, "NotifyRunning"},
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{50, nullptr, "GetPseudoDeviceId"},
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{50, &IApplicationFunctions::GetPseudoDeviceId, "GetPseudoDeviceId"},
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{60, nullptr, "SetMediaPlaybackStateForApplication"},
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{65, nullptr, "IsGamePlayRecordingSupported"},
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{66, &IApplicationFunctions::InitializeGamePlayRecording, "InitializeGamePlayRecording"},
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@@ -684,6 +684,17 @@ void IApplicationFunctions::NotifyRunning(Kernel::HLERequestContext& ctx) {
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NGLOG_WARNING(Service_AM, "(STUBBED) called");
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}
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void IApplicationFunctions::GetPseudoDeviceId(Kernel::HLERequestContext& ctx) {
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IPC::ResponseBuilder rb{ctx, 6};
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rb.Push(RESULT_SUCCESS);
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// Returns a 128-bit UUID
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rb.Push<u64>(0);
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rb.Push<u64>(0);
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NGLOG_WARNING(Service_AM, "(STUBBED) called");
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}
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void InstallInterfaces(SM::ServiceManager& service_manager,
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std::shared_ptr<NVFlinger::NVFlinger> nvflinger) {
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std::make_shared<AppletAE>(nvflinger)->InstallAsService(service_manager);
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@@ -138,6 +138,7 @@ private:
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void InitializeGamePlayRecording(Kernel::HLERequestContext& ctx);
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void SetGamePlayRecordingState(Kernel::HLERequestContext& ctx);
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void NotifyRunning(Kernel::HLERequestContext& ctx);
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void GetPseudoDeviceId(Kernel::HLERequestContext& ctx);
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};
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class IHomeMenuFunctions final : public ServiceFramework<IHomeMenuFunctions> {
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@@ -38,7 +38,7 @@ public:
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{8, nullptr, "SetPriority"},
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{9, nullptr, "SetNetworkProfileId"},
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{10, nullptr, "SetRejectable"},
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{11, nullptr, "SetConnectionConfirmationOption"},
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{11, &IRequest::SetConnectionConfirmationOption, "SetConnectionConfirmationOption"},
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{12, nullptr, "SetPersistent"},
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{13, nullptr, "SetInstant"},
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{14, nullptr, "SetSustainable"},
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@@ -67,23 +67,32 @@ private:
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rb.Push(RESULT_SUCCESS);
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rb.Push<u32>(0);
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}
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void GetResult(Kernel::HLERequestContext& ctx) {
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NGLOG_WARNING(Service_NIFM, "(STUBBED) called");
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IPC::ResponseBuilder rb{ctx, 2};
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rb.Push(RESULT_SUCCESS);
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}
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void GetSystemEventReadableHandles(Kernel::HLERequestContext& ctx) {
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NGLOG_WARNING(Service_NIFM, "(STUBBED) called");
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IPC::ResponseBuilder rb{ctx, 2, 2};
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rb.Push(RESULT_SUCCESS);
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rb.PushCopyObjects(event1, event2);
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}
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void Cancel(Kernel::HLERequestContext& ctx) {
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NGLOG_WARNING(Service_NIFM, "(STUBBED) called");
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IPC::ResponseBuilder rb{ctx, 2};
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rb.Push(RESULT_SUCCESS);
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}
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void SetConnectionConfirmationOption(Kernel::HLERequestContext& ctx) {
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NGLOG_WARNING(Service_NIFM, "(STUBBED) called");
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IPC::ResponseBuilder rb{ctx, 2};
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rb.Push(RESULT_SUCCESS);
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}
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Kernel::SharedPtr<Kernel::Event> event1, event2;
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};
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@@ -26,6 +26,10 @@ u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vec
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return ZCullGetInfo(input, output);
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case IoctlCommand::IocZbcSetTable:
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return ZBCSetTable(input, output);
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case IoctlCommand::IocZbcQueryTable:
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return ZBCQueryTable(input, output);
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case IoctlCommand::IocFlushL2:
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return FlushL2(input, output);
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}
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UNIMPLEMENTED_MSG("Unimplemented ioctl");
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return 0;
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@@ -136,4 +140,22 @@ u32 nvhost_ctrl_gpu::ZBCSetTable(const std::vector<u8>& input, std::vector<u8>&
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return 0;
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}
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u32 nvhost_ctrl_gpu::ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output) {
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NGLOG_WARNING(Service_NVDRV, "(STUBBED) called");
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IoctlZbcQueryTable params{};
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std::memcpy(¶ms, input.data(), input.size());
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// TODO : To implement properly
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std::memcpy(output.data(), ¶ms, output.size());
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return 0;
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}
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u32 nvhost_ctrl_gpu::FlushL2(const std::vector<u8>& input, std::vector<u8>& output) {
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NGLOG_WARNING(Service_NVDRV, "(STUBBED) called");
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IoctlFlushL2 params{};
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std::memcpy(¶ms, input.data(), input.size());
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// TODO : To implement properly
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std::memcpy(output.data(), ¶ms, output.size());
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return 0;
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}
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} // namespace Service::Nvidia::Devices
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@@ -26,6 +26,18 @@ private:
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IocZcullGetCtxSizeCommand = 0x80044701,
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IocZcullGetInfo = 0x80284702,
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IocZbcSetTable = 0x402C4703,
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IocZbcQueryTable = 0xC0344704,
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IocFlushL2 = 0x40084707,
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IocInvalICache = 0x4008470D,
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IocSetMmudebugMode = 0x4008470E,
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IocSetSmDebugMode = 0x4010470F,
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IocWaitForPause = 0xC0084710,
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IocGetTcpExceptionEnStatus = 0x80084711,
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IocNumVsms = 0x80084712,
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IocVsmsMapping = 0xC0044713,
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IocGetErrorChannelUserData = 0xC008471B,
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IocGetGpuTime = 0xC010471C,
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IocGetCpuTimeCorrelationInfo = 0xC108471D,
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};
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struct IoctlGpuCharacteristics {
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@@ -127,12 +139,31 @@ private:
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};
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static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size");
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struct IoctlZbcQueryTable {
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u32_le color_ds[4];
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u32_le color_l2[4];
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u32_le depth;
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u32_le ref_cnt;
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u32_le format;
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u32_le type;
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u32_le index_size;
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};
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static_assert(sizeof(IoctlZbcQueryTable) == 52, "IoctlZbcQueryTable is incorrect size");
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struct IoctlFlushL2 {
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u32_le flush; // l2_flush | l2_invalidate << 1 | fb_flush << 2
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u32_le reserved;
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};
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static_assert(sizeof(IoctlFlushL2) == 8, "IoctlFlushL2 is incorrect size");
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u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output);
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u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output);
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u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output);
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u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output);
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u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output);
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u32 ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output);
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u32 ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output);
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u32 FlushL2(const std::vector<u8>& input, std::vector<u8>& output);
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};
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} // namespace Service::Nvidia::Devices
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@@ -173,6 +173,13 @@ enum class SubOp : u64 {
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Min = 0x8,
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};
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enum class FloatRoundingOp : u64 {
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None = 0,
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Floor = 1,
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Ceil = 2,
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Trunc = 3,
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};
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union Instruction {
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Instruction& operator=(const Instruction& instr) {
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value = instr.value;
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@@ -290,11 +297,20 @@ union Instruction {
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union {
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BitField<10, 2, Register::Size> size;
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BitField<13, 1, u64> is_signed;
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BitField<12, 1, u64> is_output_signed;
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BitField<13, 1, u64> is_input_signed;
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BitField<41, 2, u64> selector;
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BitField<45, 1, u64> negate_a;
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BitField<49, 1, u64> abs_a;
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BitField<50, 1, u64> saturate_a;
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union {
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BitField<39, 2, FloatRoundingOp> rounding;
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} f2i;
|
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|
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union {
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BitField<39, 4, u64> rounding;
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} f2f;
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} conversion;
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|
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union {
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@@ -560,9 +576,9 @@ private:
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INST("0100110010101---", Id::F2F_C, Type::Conversion, "F2F_C"),
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INST("0101110010101---", Id::F2F_R, Type::Conversion, "F2F_R"),
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INST("0011100-10101---", Id::F2F_IMM, Type::Conversion, "F2F_IMM"),
|
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INST("0100110010110---", Id::F2I_C, Type::Arithmetic, "F2I_C"),
|
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INST("0101110010110---", Id::F2I_R, Type::Arithmetic, "F2I_R"),
|
||||
INST("0011100-10110---", Id::F2I_IMM, Type::Arithmetic, "F2I_IMM"),
|
||||
INST("0100110010110---", Id::F2I_C, Type::Conversion, "F2I_C"),
|
||||
INST("0101110010110---", Id::F2I_R, Type::Conversion, "F2I_R"),
|
||||
INST("0011100-10110---", Id::F2I_IMM, Type::Conversion, "F2I_IMM"),
|
||||
INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
|
||||
INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
|
||||
INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
|
||||
|
||||
@@ -26,6 +26,10 @@ u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
|
||||
ASSERT(format != RenderTargetFormat::NONE);
|
||||
|
||||
switch (format) {
|
||||
case RenderTargetFormat::RGBA32_FLOAT:
|
||||
return 16;
|
||||
case RenderTargetFormat::RGBA16_FLOAT:
|
||||
return 8;
|
||||
case RenderTargetFormat::RGBA8_UNORM:
|
||||
case RenderTargetFormat::RGB10_A2_UNORM:
|
||||
return 4;
|
||||
|
||||
@@ -15,10 +15,12 @@ namespace Tegra {
|
||||
|
||||
enum class RenderTargetFormat : u32 {
|
||||
NONE = 0x0,
|
||||
RGBA32_FLOAT = 0xC0,
|
||||
RGBA16_FLOAT = 0xCA,
|
||||
RGB10_A2_UNORM = 0xD1,
|
||||
RGBA8_UNORM = 0xD5,
|
||||
RGBA8_SRGB = 0xD6,
|
||||
R11G11B10_FLOAT = 0xE0,
|
||||
};
|
||||
|
||||
/// Returns the number of bytes per pixel of each rendertarget format.
|
||||
|
||||
@@ -50,6 +50,7 @@ static constexpr std::array<FormatTuple, SurfaceParams::MaxPixelFormat> tex_form
|
||||
{GL_RGB5_A1, GL_RGBA, GL_UNSIGNED_SHORT_1_5_5_5_REV, false}, // A1B5G5R5
|
||||
{GL_R8, GL_RED, GL_UNSIGNED_BYTE, false}, // R8
|
||||
{GL_RGBA16F, GL_RGBA, GL_HALF_FLOAT, false}, // RGBA16F
|
||||
{GL_R11F_G11F_B10F, GL_RGB, GL_UNSIGNED_INT_10F_11F_11F_REV, false}, // R11FG11FB10F
|
||||
{GL_COMPRESSED_RGB_S3TC_DXT1_EXT, GL_RGB, GL_UNSIGNED_INT_8_8_8_8, true}, // DXT1
|
||||
{GL_COMPRESSED_RGBA_S3TC_DXT3_EXT, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8, true}, // DXT23
|
||||
{GL_COMPRESSED_RGBA_S3TC_DXT5_EXT, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8, true}, // DXT45
|
||||
@@ -60,8 +61,10 @@ static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType
|
||||
const SurfaceType type = SurfaceParams::GetFormatType(pixel_format);
|
||||
if (type == SurfaceType::ColorTexture) {
|
||||
ASSERT(static_cast<size_t>(pixel_format) < tex_format_tuples.size());
|
||||
// For now only UNORM components are supported, or RGBA16F which is type FLOAT
|
||||
ASSERT(component_type == ComponentType::UNorm || pixel_format == PixelFormat::RGBA16F);
|
||||
// For now only UNORM components are supported, or either R11FG11FB10F or RGBA16F which are
|
||||
// type FLOAT
|
||||
ASSERT(component_type == ComponentType::UNorm || pixel_format == PixelFormat::RGBA16F ||
|
||||
pixel_format == PixelFormat::R11FG11FB10F);
|
||||
return tex_format_tuples[static_cast<unsigned int>(pixel_format)];
|
||||
} else if (type == SurfaceType::Depth || type == SurfaceType::DepthStencil) {
|
||||
// TODO(Subv): Implement depth formats
|
||||
@@ -110,11 +113,12 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr, Tegra:
|
||||
Tegra::GPUVAddr),
|
||||
SurfaceParams::MaxPixelFormat>
|
||||
morton_to_gl_fns = {
|
||||
MortonCopy<true, PixelFormat::ABGR8>, MortonCopy<true, PixelFormat::B5G6R5>,
|
||||
MortonCopy<true, PixelFormat::A2B10G10R10>, MortonCopy<true, PixelFormat::A1B5G5R5>,
|
||||
MortonCopy<true, PixelFormat::R8>, MortonCopy<true, PixelFormat::RGBA16F>,
|
||||
MortonCopy<true, PixelFormat::DXT1>, MortonCopy<true, PixelFormat::DXT23>,
|
||||
MortonCopy<true, PixelFormat::DXT45>, MortonCopy<true, PixelFormat::DXN1>,
|
||||
MortonCopy<true, PixelFormat::ABGR8>, MortonCopy<true, PixelFormat::B5G6R5>,
|
||||
MortonCopy<true, PixelFormat::A2B10G10R10>, MortonCopy<true, PixelFormat::A1B5G5R5>,
|
||||
MortonCopy<true, PixelFormat::R8>, MortonCopy<true, PixelFormat::RGBA16F>,
|
||||
MortonCopy<true, PixelFormat::R11FG11FB10F>, MortonCopy<true, PixelFormat::DXT1>,
|
||||
MortonCopy<true, PixelFormat::DXT23>, MortonCopy<true, PixelFormat::DXT45>,
|
||||
MortonCopy<true, PixelFormat::DXN1>,
|
||||
};
|
||||
|
||||
static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr, Tegra::GPUVAddr,
|
||||
@@ -127,6 +131,7 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr, Tegra:
|
||||
MortonCopy<false, PixelFormat::A1B5G5R5>,
|
||||
MortonCopy<false, PixelFormat::R8>,
|
||||
MortonCopy<false, PixelFormat::RGBA16F>,
|
||||
MortonCopy<false, PixelFormat::R11FG11FB10F>,
|
||||
// TODO(Subv): Swizzling the DXT1/DXT23/DXT45/DXN1 formats is not yet supported
|
||||
nullptr,
|
||||
nullptr,
|
||||
|
||||
@@ -60,10 +60,11 @@ struct SurfaceParams {
|
||||
A1B5G5R5 = 3,
|
||||
R8 = 4,
|
||||
RGBA16F = 5,
|
||||
DXT1 = 6,
|
||||
DXT23 = 7,
|
||||
DXT45 = 8,
|
||||
DXN1 = 9, // This is also known as BC4
|
||||
R11FG11FB10F = 6,
|
||||
DXT1 = 7,
|
||||
DXT23 = 8,
|
||||
DXT45 = 9,
|
||||
DXN1 = 10, // This is also known as BC4
|
||||
|
||||
Max,
|
||||
Invalid = 255,
|
||||
@@ -104,7 +105,8 @@ struct SurfaceParams {
|
||||
1, // A2B10G10R10
|
||||
1, // A1B5G5R5
|
||||
1, // R8
|
||||
2, // RGBA16F
|
||||
1, // RGBA16F
|
||||
1, // R11FG11FB10F
|
||||
4, // DXT1
|
||||
4, // DXT23
|
||||
4, // DXT45
|
||||
@@ -129,6 +131,7 @@ struct SurfaceParams {
|
||||
16, // A1B5G5R5
|
||||
8, // R8
|
||||
64, // RGBA16F
|
||||
32, // R11FG11FB10F
|
||||
64, // DXT1
|
||||
128, // DXT23
|
||||
128, // DXT45
|
||||
@@ -151,6 +154,8 @@ struct SurfaceParams {
|
||||
return PixelFormat::A2B10G10R10;
|
||||
case Tegra::RenderTargetFormat::RGBA16_FLOAT:
|
||||
return PixelFormat::RGBA16F;
|
||||
case Tegra::RenderTargetFormat::R11G11B10_FLOAT:
|
||||
return PixelFormat::R11FG11FB10F;
|
||||
default:
|
||||
NGLOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
|
||||
UNREACHABLE();
|
||||
@@ -182,6 +187,8 @@ struct SurfaceParams {
|
||||
return PixelFormat::R8;
|
||||
case Tegra::Texture::TextureFormat::R16_G16_B16_A16:
|
||||
return PixelFormat::RGBA16F;
|
||||
case Tegra::Texture::TextureFormat::BF10GF11RF11:
|
||||
return PixelFormat::R11FG11FB10F;
|
||||
case Tegra::Texture::TextureFormat::DXT1:
|
||||
return PixelFormat::DXT1;
|
||||
case Tegra::Texture::TextureFormat::DXT23:
|
||||
@@ -211,6 +218,8 @@ struct SurfaceParams {
|
||||
return Tegra::Texture::TextureFormat::R8;
|
||||
case PixelFormat::RGBA16F:
|
||||
return Tegra::Texture::TextureFormat::R16_G16_B16_A16;
|
||||
case PixelFormat::R11FG11FB10F:
|
||||
return Tegra::Texture::TextureFormat::BF10GF11RF11;
|
||||
case PixelFormat::DXT1:
|
||||
return Tegra::Texture::TextureFormat::DXT1;
|
||||
case PixelFormat::DXT23:
|
||||
@@ -243,6 +252,7 @@ struct SurfaceParams {
|
||||
case Tegra::RenderTargetFormat::RGB10_A2_UNORM:
|
||||
return ComponentType::UNorm;
|
||||
case Tegra::RenderTargetFormat::RGBA16_FLOAT:
|
||||
case Tegra::RenderTargetFormat::R11G11B10_FLOAT:
|
||||
return ComponentType::Float;
|
||||
default:
|
||||
NGLOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
|
||||
|
||||
@@ -895,7 +895,7 @@ private:
|
||||
}
|
||||
|
||||
case OpCode::Type::Shift: {
|
||||
std::string op_a = regs.GetRegisterAsInteger(instr.gpr8, 0, false);
|
||||
std::string op_a = regs.GetRegisterAsInteger(instr.gpr8, 0, true);
|
||||
std::string op_b;
|
||||
|
||||
if (instr.is_b_imm) {
|
||||
@@ -991,18 +991,20 @@ private:
|
||||
ASSERT_MSG(!instr.conversion.selector, "Unimplemented");
|
||||
|
||||
std::string op_a =
|
||||
regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_signed);
|
||||
regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_input_signed);
|
||||
|
||||
if (instr.conversion.abs_a) {
|
||||
op_a = "abs(" + op_a + ')';
|
||||
}
|
||||
|
||||
regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_signed, 0, op_a, 1, 1);
|
||||
regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
|
||||
1);
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::I2F_R: {
|
||||
ASSERT_MSG(!instr.conversion.selector, "Unimplemented");
|
||||
std::string op_a =
|
||||
regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_signed);
|
||||
regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_input_signed);
|
||||
|
||||
if (instr.conversion.abs_a) {
|
||||
op_a = "abs(" + op_a + ')';
|
||||
@@ -1012,6 +1014,8 @@ private:
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::F2F_R: {
|
||||
// TODO(Subv): Implement rounding operations.
|
||||
ASSERT_MSG(instr.conversion.f2f.rounding == 0, "Unimplemented rounding operation");
|
||||
std::string op_a = regs.GetRegisterAsFloat(instr.gpr20);
|
||||
|
||||
if (instr.conversion.abs_a) {
|
||||
@@ -1021,6 +1025,43 @@ private:
|
||||
regs.SetRegisterToFloat(instr.gpr0, 0, op_a, 1, 1);
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::F2I_R: {
|
||||
std::string op_a = regs.GetRegisterAsFloat(instr.gpr20);
|
||||
|
||||
if (instr.conversion.abs_a) {
|
||||
op_a = "abs(" + op_a + ')';
|
||||
}
|
||||
|
||||
using Tegra::Shader::FloatRoundingOp;
|
||||
switch (instr.conversion.f2i.rounding) {
|
||||
case FloatRoundingOp::None:
|
||||
break;
|
||||
case FloatRoundingOp::Floor:
|
||||
op_a = "floor(" + op_a + ')';
|
||||
break;
|
||||
case FloatRoundingOp::Ceil:
|
||||
op_a = "ceil(" + op_a + ')';
|
||||
break;
|
||||
case FloatRoundingOp::Trunc:
|
||||
op_a = "trunc(" + op_a + ')';
|
||||
break;
|
||||
default:
|
||||
NGLOG_CRITICAL(HW_GPU, "Unimplemented f2i rounding mode {}",
|
||||
static_cast<u32>(instr.conversion.f2i.rounding.Value()));
|
||||
UNREACHABLE();
|
||||
break;
|
||||
}
|
||||
|
||||
if (instr.conversion.is_output_signed) {
|
||||
op_a = "int(" + op_a + ')';
|
||||
} else {
|
||||
op_a = "uint(" + op_a + ')';
|
||||
}
|
||||
|
||||
regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
|
||||
1);
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
NGLOG_CRITICAL(HW_GPU, "Unhandled conversion instruction: {}", opcode->GetName());
|
||||
UNREACHABLE();
|
||||
|
||||
@@ -100,6 +100,8 @@ inline GLenum WrapMode(Tegra::Texture::WrapMode wrap_mode) {
|
||||
switch (wrap_mode) {
|
||||
case Tegra::Texture::WrapMode::Wrap:
|
||||
return GL_REPEAT;
|
||||
case Tegra::Texture::WrapMode::Mirror:
|
||||
return GL_MIRRORED_REPEAT;
|
||||
case Tegra::Texture::WrapMode::ClampToEdge:
|
||||
return GL_CLAMP_TO_EDGE;
|
||||
case Tegra::Texture::WrapMode::ClampOGL:
|
||||
|
||||
@@ -55,6 +55,7 @@ u32 BytesPerPixel(TextureFormat format) {
|
||||
return 16;
|
||||
case TextureFormat::A8R8G8B8:
|
||||
case TextureFormat::A2B10G10R10:
|
||||
case TextureFormat::BF10GF11RF11:
|
||||
return 4;
|
||||
case TextureFormat::A1B5G5R5:
|
||||
case TextureFormat::B5G6R5:
|
||||
@@ -92,6 +93,7 @@ std::vector<u8> UnswizzleTexture(VAddr address, TextureFormat format, u32 width,
|
||||
case TextureFormat::B5G6R5:
|
||||
case TextureFormat::R8:
|
||||
case TextureFormat::R16_G16_B16_A16:
|
||||
case TextureFormat::BF10GF11RF11:
|
||||
CopySwizzledData(width, height, bytes_per_pixel, bytes_per_pixel, data,
|
||||
unswizzled_data.data(), true, block_height);
|
||||
break;
|
||||
@@ -118,6 +120,7 @@ std::vector<u8> DecodeTexture(const std::vector<u8>& texture_data, TextureFormat
|
||||
case TextureFormat::A1B5G5R5:
|
||||
case TextureFormat::B5G6R5:
|
||||
case TextureFormat::R8:
|
||||
case TextureFormat::BF10GF11RF11:
|
||||
// TODO(Subv): For the time being just forward the same data without any decoding.
|
||||
rgba_data = texture_data;
|
||||
break;
|
||||
|
||||
Reference in New Issue
Block a user