arm_unicorn: Load/Save FPCR and FPSR to/from context
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2
externals/unicorn
vendored
2
externals/unicorn
vendored
Submodule externals/unicorn updated: 73f4573535...c53f666160
@@ -211,6 +211,8 @@ void ARM_Unicorn::SaveContext(ThreadContext& ctx) {
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_SP, &ctx.sp));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_SP, &ctx.sp));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_FPCR, &ctx.fpcr));
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_FPSR, &ctx.fpsr));
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for (auto i = 0; i < 29; ++i) {
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for (auto i = 0; i < 29; ++i) {
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uregs[i] = UC_ARM64_REG_X0 + i;
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uregs[i] = UC_ARM64_REG_X0 + i;
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@@ -238,6 +240,8 @@ void ARM_Unicorn::LoadContext(const ThreadContext& ctx) {
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_SP, &ctx.sp));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_SP, &ctx.sp));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_FPCR, &ctx.fpcr));
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_FPSR, &ctx.fpsr));
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for (int i = 0; i < 29; ++i) {
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for (int i = 0; i < 29; ++i) {
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uregs[i] = UC_ARM64_REG_X0 + i;
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uregs[i] = UC_ARM64_REG_X0 + i;
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