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maxwell_3d: Implement MME shadow RAM

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Implementation was based on this Ryujinx PR: https://github.com/Ryujinx/Ryujinx/pull/987
This commit is contained in:
Skyth
2020-03-17 22:06:39 +03:00
parent 1c45c8086e
commit c8aa2fe56b
2 changed files with 32 additions and 10 deletions
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25
src/video_core/engines/maxwell_3d.cpp
View File

@@ -121,10 +121,19 @@ void Maxwell3D::CallMacroMethod(u32 method, std::size_t num_parameters, const u3
void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) { void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
const u32 method = method_call.method; const u32 method = method_call.method;
u32 argument = method_call.argument;
if (method >= 0x60 && method < MacroRegistersStart) {
if (regs.shadow_ram_control == Regs::ShadowRamControl::Replay) {
argument = shadow_regs.reg_array[method];
} else if (regs.shadow_ram_control == Regs::ShadowRamControl::Track ||
regs.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) {
shadow_regs.reg_array[method] = argument;
}
}
if (method == cb_data_state.current) { if (method == cb_data_state.current) {
regs.reg_array[method] = method_call.argument; regs.reg_array[method] = argument;
ProcessCBData(method_call.argument); ProcessCBData(argument);
return; return;
} else if (cb_data_state.current != null_cb_data) { } else if (cb_data_state.current != null_cb_data) {
FinishCBData(); FinishCBData();
@@ -147,7 +156,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
executing_macro = method; executing_macro = method;
} }
macro_params.push_back(method_call.argument); macro_params.push_back(argument);
// Call the macro when there are no more parameters in the command buffer // Call the macro when there are no more parameters in the command buffer
if (method_call.IsLastCall()) { if (method_call.IsLastCall()) {
@@ -160,8 +169,8 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
ASSERT_MSG(method < Regs::NUM_REGS, ASSERT_MSG(method < Regs::NUM_REGS,
"Invalid Maxwell3D register, increase the size of the Regs structure"); "Invalid Maxwell3D register, increase the size of the Regs structure");
if (regs.reg_array[method] != method_call.argument) { if (regs.reg_array[method] != argument) {
regs.reg_array[method] = method_call.argument; regs.reg_array[method] = argument;
for (const auto& table : dirty.tables) { for (const auto& table : dirty.tables) {
dirty.flags[table[method]] = true; dirty.flags[table[method]] = true;
@@ -170,11 +179,11 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
switch (method) { switch (method) {
case MAXWELL3D_REG_INDEX(macros.data): { case MAXWELL3D_REG_INDEX(macros.data): {
ProcessMacroUpload(method_call.argument); ProcessMacroUpload(argument);
break; break;
} }
case MAXWELL3D_REG_INDEX(macros.bind): { case MAXWELL3D_REG_INDEX(macros.bind): {
ProcessMacroBind(method_call.argument); ProcessMacroBind(argument);
break; break;
} }
case MAXWELL3D_REG_INDEX(firmware[4]): { case MAXWELL3D_REG_INDEX(firmware[4]): {
@@ -250,7 +259,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
} }
case MAXWELL3D_REG_INDEX(data_upload): { case MAXWELL3D_REG_INDEX(data_upload): {
const bool is_last_call = method_call.IsLastCall(); const bool is_last_call = method_call.IsLastCall();
upload_state.ProcessData(method_call.argument, is_last_call); upload_state.ProcessData(argument, is_last_call);
if (is_last_call) { if (is_last_call) {
OnMemoryWrite(); OnMemoryWrite();
} }

17
src/video_core/engines/maxwell_3d.h
View File

@@ -531,6 +531,13 @@ public:
Fill = 0x1b02, Fill = 0x1b02,
}; };
enum class ShadowRamControl : u32 {
Track = 0,
TrackWithFilter = 1,
Passthrough = 2,
Replay = 3,
};
struct RenderTargetConfig { struct RenderTargetConfig {
u32 address_high; u32 address_high;
u32 address_low; u32 address_low;
@@ -674,7 +681,9 @@ public:
u32 bind; u32 bind;
} macros; } macros;
INSERT_UNION_PADDING_WORDS(0x17); ShadowRamControl shadow_ram_control;
INSERT_UNION_PADDING_WORDS(0x16);
Upload::Registers upload; Upload::Registers upload;
struct { struct {
@@ -1263,7 +1272,10 @@ public:
}; };
std::array<u32, NUM_REGS> reg_array; std::array<u32, NUM_REGS> reg_array;
}; };
} regs{}; };
Regs regs{};
Regs shadow_regs{};
static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size"); static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
static_assert(std::is_trivially_copyable_v<Regs>, "Maxwell3D Regs must be trivially copyable"); static_assert(std::is_trivially_copyable_v<Regs>, "Maxwell3D Regs must be trivially copyable");
@@ -1458,6 +1470,7 @@ private:
"Field " #field_name " has invalid position") "Field " #field_name " has invalid position")
ASSERT_REG_POSITION(macros, 0x45); ASSERT_REG_POSITION(macros, 0x45);
ASSERT_REG_POSITION(shadow_ram_control, 0x49);
ASSERT_REG_POSITION(upload, 0x60); ASSERT_REG_POSITION(upload, 0x60);
ASSERT_REG_POSITION(exec_upload, 0x6C); ASSERT_REG_POSITION(exec_upload, 0x6C);
ASSERT_REG_POSITION(data_upload, 0x6D); ASSERT_REG_POSITION(data_upload, 0x6D);