diff --git a/src/video_core/shader/control_flow.cpp b/src/video_core/shader/control_flow.cpp index 438ca9094b..7c8bd7e2f1 100644 --- a/src/video_core/shader/control_flow.cpp +++ b/src/video_core/shader/control_flow.cpp @@ -92,9 +92,9 @@ struct ProgramControl { }; struct CFGRebuildState { - explicit CFGRebuildState(ProgramControl& control, const ProgramCode& program_code_, u32 start_, + explicit CFGRebuildState(ProgramControl& control_, const ProgramCode& program_code_, u32 start_, u32 base_start_, Registry& registry_) - : control{control}, program_code{program_code_}, registry{registry_}, start{start_}, + : control{control_}, program_code{program_code_}, registry{registry_}, start{start_}, base_start{base_start_} {} ProgramControl& control; @@ -216,24 +216,26 @@ std::optional> TrackLDC(const CFGRebuildState& state, std::optional TrackSHLRegister(const CFGRebuildState& state, u32& pos, u64 ldc_tracked_register) { - return TrackInstruction(state, pos, - [ldc_tracked_register](auto instr, const auto& opcode) { - return opcode.GetId() == OpCode::Id::SHL_IMM && - instr.gpr0.Value() == ldc_tracked_register; - }, - [](auto instr, const auto&) { return instr.gpr8.Value(); }); + return TrackInstruction( + state, pos, + [ldc_tracked_register](auto instr, const auto& opcode) { + return opcode.GetId() == OpCode::Id::SHL_IMM && + instr.gpr0.Value() == ldc_tracked_register; + }, + [](auto instr, const auto&) { return instr.gpr8.Value(); }); } std::optional TrackIMNMXValue(const CFGRebuildState& state, u32& pos, u64 shl_tracked_register) { - return TrackInstruction(state, pos, - [shl_tracked_register](auto instr, const auto& opcode) { - return opcode.GetId() == OpCode::Id::IMNMX_IMM && - instr.gpr0.Value() == shl_tracked_register; - }, - [](auto instr, const auto&) { - return static_cast(instr.alu.GetSignedImm20_20() + 1); - }); + return TrackInstruction( + state, pos, + [shl_tracked_register](auto instr, const auto& opcode) { + return opcode.GetId() == OpCode::Id::IMNMX_IMM && + instr.gpr0.Value() == shl_tracked_register; + }, + [](auto instr, const auto&) { + return static_cast(instr.alu.GetSignedImm20_20() + 1); + }); } std::optional TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) { @@ -686,8 +688,6 @@ void DecompileShader(CFGRebuildState& state) { state.manager->Decompile(); } -} // Anonymous namespace - ShaderFunction ScanFunction(ProgramControl& control, const ProgramCode& program_code, u32 start_address, u32 base_start, const CompilerSettings& settings, Registry& registry) { @@ -788,6 +788,8 @@ ShaderFunction ScanFunction(ProgramControl& control, const ProgramCode& program_ return result_out; } +} // Anonymous namespace + std::unique_ptr ScanFlow(const ProgramCode& program_code, u32 start_address, const CompilerSettings& settings, Registry& registry) { ProgramControl control{}; diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h index 23007afdff..94715b0699 100644 --- a/src/video_core/shader/shader_ir.h +++ b/src/video_core/shader/shader_ir.h @@ -26,7 +26,7 @@ namespace VideoCommon::Shader { struct ShaderBlock; -constexpr u32 MAX_PROGRAM_LENGTH = 0x8000; +constexpr u32 MAX_PROGRAM_LENGTH = 0x2000; struct ConstBuffer { constexpr explicit ConstBuffer(u32 max_offset_, bool is_indirect_)