From 222ac9b58cc335cbe04e90be14a50652cdd6b420 Mon Sep 17 00:00:00 2001 From: David Marcec Date: Mon, 5 Feb 2018 15:40:09 -0800 Subject: [PATCH] Fixed Log service naming, CtxObjects now u32, renamed all structs, added static_asserts to structs, used INSERT_PADDING_WORDS instead of u32s --- .../service/nvdrv/devices/nvhost_as_gpu.cpp | 14 ++--- .../hle/service/nvdrv/devices/nvhost_as_gpu.h | 25 +++++---- .../service/nvdrv/devices/nvhost_ctrl_gpu.cpp | 12 ++--- .../service/nvdrv/devices/nvhost_ctrl_gpu.h | 38 ++++++++------ .../hle/service/nvdrv/devices/nvhost_gpu.cpp | 20 +++---- .../hle/service/nvdrv/devices/nvhost_gpu.h | 52 +++++++++++-------- src/core/hle/service/nvdrv/interface.cpp | 4 +- 7 files changed, 94 insertions(+), 71 deletions(-) diff --git a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp index 18bcaa2006..fd4ae5f13f 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp @@ -11,8 +11,8 @@ namespace Nvidia { namespace Devices { u32 nvhost_as_gpu::ioctl(u32 command, const std::vector& input, std::vector& output) { - LOG_DEBUG(Service_NVDRV, "Got Ioctl 0x%x, inputsz: 0x%x, outputsz: 0x%x", command, input.size(), - output.size()); + LOG_DEBUG(Service_NVDRV, "called, command=0x%08x, input_size=0x%llx, output_size=0x%llx", + command, input.size(), output.size()); switch (static_cast(command)) { case IoctlCommand::IocInitalizeExCommand: @@ -30,7 +30,7 @@ u32 nvhost_as_gpu::ioctl(u32 command, const std::vector& input, std::vector< } u32 nvhost_as_gpu::InitalizeEx(const std::vector& input, std::vector& output) { - initalize_ex params{}; + IoctlInitalizeEx params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, big_page_size=0x%x", params.big_page_size); std::memcpy(output.data(), ¶ms, output.size()); @@ -38,7 +38,7 @@ u32 nvhost_as_gpu::InitalizeEx(const std::vector& input, std::vector& ou } u32 nvhost_as_gpu::AllocateSpace(const std::vector& input, std::vector& output) { - alloc_space params{}; + IoctlAllocSpace params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, pages=%x, page_size=%x, flags=%x", params.pages, params.page_size, params.flags); @@ -48,7 +48,7 @@ u32 nvhost_as_gpu::AllocateSpace(const std::vector& input, std::vector& } u32 nvhost_as_gpu::MapBufferEx(const std::vector& input, std::vector& output) { - map_buffer_ex params{}; + IoctlMapBufferEx params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, @@ -62,7 +62,7 @@ u32 nvhost_as_gpu::MapBufferEx(const std::vector& input, std::vector& ou } u32 nvhost_as_gpu::BindChannel(const std::vector& input, std::vector& output) { - bind_channel params{}; + IoctlBindChannel params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_DEBUG(Service_NVDRV, "called, fd=%x", params.fd); channel = params.fd; @@ -71,7 +71,7 @@ u32 nvhost_as_gpu::BindChannel(const std::vector& input, std::vector& ou } u32 nvhost_as_gpu::GetVARegions(const std::vector& input, std::vector& output) { - get_va_regions params{}; + IoctlGetVaRegions params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service, "(STUBBED) called, buf_addr=%lx, buf_size=%x", params.buf_addr, params.buf_size); diff --git a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h index f82d328166..a88b435530 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h @@ -29,7 +29,7 @@ private: IocGetVaRegionsCommand = 0xC0404108, }; - struct initalize_ex { + struct IoctlInitalizeEx { u32_le big_page_size; // depends on GPU's available_big_page_sizes; 0=default s32_le as_fd; // ignored; passes 0 u32_le flags; // passes 0 @@ -38,19 +38,21 @@ private: u64_le unk1; u64_le unk2; }; + static_assert(sizeof(IoctlInitalizeEx) == 40, "IoctlInitalizeEx is incorrect size"); - struct alloc_space { + struct IoctlAllocSpace { u32_le pages; u32_le page_size; u32_le flags; - u32_le pad; + INSERT_PADDING_WORDS(1); union { u64_le offset; u64_le align; }; }; + static_assert(sizeof(IoctlAllocSpace) == 24, "IoctlInitalizeEx is incorrect size"); - struct map_buffer_ex { + struct IoctlMapBufferEx { u32_le flags; // bit0: fixed_offset, bit2: cacheable u32_le kind; // -1 is default u32_le nvmap_handle; @@ -59,24 +61,29 @@ private: u64_le mapping_size; u64_le offset; }; + static_assert(sizeof(IoctlMapBufferEx) == 40, "IoctlMapBufferEx is incorrect size"); - struct bind_channel { + struct IoctlBindChannel { u32_le fd; }; + static_assert(sizeof(IoctlBindChannel) == 4, "IoctlBindChannel is incorrect size"); - struct va_region { + struct IoctlVaRegion { u64_le offset; u32_le page_size; - u32_le pad; + INSERT_PADDING_WORDS(1); u64_le pages; }; + static_assert(sizeof(IoctlVaRegion) == 24, "IoctlVaRegion is incorrect size"); - struct get_va_regions { + struct IoctlGetVaRegions { u64_le buf_addr; // (contained output user ptr on linux, ignored) u32_le buf_size; // forced to 2*sizeof(struct va_region) u32_le reserved; - va_region regions[2]; + IoctlVaRegion regions[2]; }; + static_assert(sizeof(IoctlGetVaRegions) == 16 + sizeof(IoctlVaRegion) * 2, + "IoctlGetVaRegions is incorrect size"); u32 channel{}; diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp index bfb212551b..5466b0d9b7 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp @@ -11,8 +11,8 @@ namespace Nvidia { namespace Devices { u32 nvhost_ctrl_gpu::ioctl(u32 command, const std::vector& input, std::vector& output) { - LOG_DEBUG(Service_NVDRV, "Got Ioctl 0x%x, inputsz: 0x%x, outputsz: 0x%x", command, input.size(), - output.size()); + LOG_DEBUG(Service_NVDRV, "called, command=0x%08x, input_size=0x%llx, output_size=0x%llx", + command, input.size(), output.size()); switch (static_cast(command)) { case IoctlCommand::IocGetCharacteristicsCommand: @@ -32,7 +32,7 @@ u32 nvhost_ctrl_gpu::ioctl(u32 command, const std::vector& input, std::vecto u32 nvhost_ctrl_gpu::GetCharacteristics(const std::vector& input, std::vector& output) { LOG_DEBUG(Service_NVDRV, "called"); - characteristics params{}; + IoctlCharacteristics params{}; std::memcpy(¶ms, input.data(), input.size()); params.gc.arch = 0x120; params.gc.impl = 0xb; @@ -76,7 +76,7 @@ u32 nvhost_ctrl_gpu::GetCharacteristics(const std::vector& input, std::vecto } u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector& input, std::vector& output) { - nvgpu_gpu_get_tpc_masks_args params{}; + IoctlGpuGetTpcMasksArgs params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, mask=0x%x, mask_buf_addr=0x%lx", params.mask_buf_size, params.mask_buf_addr); @@ -86,7 +86,7 @@ u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector& input, std::vector& u32 nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector& input, std::vector& output) { LOG_DEBUG(Service_NVDRV, "called"); - active_slot_mask params{}; + IoctlActiveSlotMask params{}; std::memcpy(¶ms, input.data(), input.size()); params.slot = 0x07; params.mask = 0x01; @@ -96,7 +96,7 @@ u32 nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector& input, std::vector u32 nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector& input, std::vector& output) { LOG_DEBUG(Service_NVDRV, "called"); - zcull_get_ctx_size params{}; + IoctlZcullGetCtxSize params{}; std::memcpy(¶ms, input.data(), input.size()); params.size = 0x1; std::memcpy(output.data(), ¶ms, output.size()); diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h index 8c1d8aa8c4..a4621024f5 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h @@ -29,7 +29,7 @@ private: IocZcullGetInfo = 0x80284702, }; - struct gpu_characteristics { + struct IoctlGpuCharacteristics { u32_le arch; // 0x120 (NVGPU_GPU_ARCH_GM200) u32_le impl; // 0xB (NVGPU_GPU_IMPL_GM20B) u32_le rev; // 0xA1 (Revision A1) @@ -66,41 +66,45 @@ private: u64_le chipname; // 0x6230326D67 ("gm20b") u64_le gr_compbit_store_base_hw; // 0x0 (not supported) }; + static_assert(sizeof(IoctlGpuCharacteristics) == 160, + "IoctlGpuCharacteristics is incorrect size"); - struct characteristics { + struct IoctlCharacteristics { u64_le gpu_characteristics_buf_size; // must not be NULL, but gets overwritten with // 0xA0=max_size u64_le gpu_characteristics_buf_addr; // ignored, but must not be NULL - gpu_characteristics gc; + IoctlGpuCharacteristics gc; }; + static_assert(sizeof(IoctlCharacteristics) == 16 + sizeof(IoctlGpuCharacteristics), + "IoctlCharacteristics is incorrect size"); - struct nvgpu_gpu_get_tpc_masks_args { - /* [in] TPC mask buffer size reserved by userspace. Should be - at least sizeof(__u32) * fls(gpc_mask) to receive TPC - mask for each GPC. - [out] full kernel buffer size - */ + struct IoctlGpuGetTpcMasksArgs { + /// [in] TPC mask buffer size reserved by userspace. Should be at least + /// sizeof(__u32) * fls(gpc_mask) to receive TPC mask for each GPC. + /// [out] full kernel buffer size u32_le mask_buf_size; u32_le reserved; - /* [in] pointer to TPC mask buffer. It will receive one - 32-bit TPC mask per GPC or 0 if GPC is not enabled or - not present. This parameter is ignored if - mask_buf_size is 0. */ + /// [in] pointer to TPC mask buffer. It will receive one 32-bit TPC mask per GPC or 0 if + /// GPC is not enabled or not present. This parameter is ignored if mask_buf_size is 0. u64_le mask_buf_addr; u64_le unk; // Nintendo add this? }; + static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24, + "IoctlGpuGetTpcMasksArgs is incorrect size"); - struct active_slot_mask { + struct IoctlActiveSlotMask { u32_le slot; // always 0x07 u32_le mask; }; + static_assert(sizeof(IoctlActiveSlotMask) == 8, "IoctlActiveSlotMask is incorrect size"); - struct zcull_get_ctx_size { + struct IoctlZcullGetCtxSize { u32_le size; }; + static_assert(sizeof(IoctlZcullGetCtxSize) == 4, "IoctlZcullGetCtxSize is incorrect size"); - struct nvgpu_gpu_zcull_get_info_args { + struct IoctlNvgpuGpuZcullGetInfoArgs { u32_le width_align_pixels; u32_le height_align_pixels; u32_le pixel_squares_by_aliquots; @@ -112,6 +116,8 @@ private: u32_le subregion_height_align_pixels; u32_le subregion_count; }; + static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40, + "IoctlNvgpuGpuZcullGetInfoArgs is incorrect size"); u32 GetCharacteristics(const std::vector& input, std::vector& output); u32 GetTPCMasks(const std::vector& input, std::vector& output); diff --git a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp index dde93cef79..a2d4b0c04f 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp @@ -12,8 +12,8 @@ namespace Nvidia { namespace Devices { u32 nvhost_gpu::ioctl(u32 command, const std::vector& input, std::vector& output) { - LOG_DEBUG(Service_NVDRV, "Got Ioctl 0x%x, inputsz: 0x%x, outputsz: 0x%x", command, input.size(), - output.size()); + LOG_DEBUG(Service_NVDRV, "called, command=0x%08x, input_size=0x%llx, output_size=0x%llx", + command, input.size(), output.size()); switch (static_cast(command)) { case IoctlCommand::IocSetNVMAPfdCommand: @@ -49,7 +49,7 @@ u32 nvhost_gpu::ioctl(u32 command, const std::vector& input, std::vector }; u32 nvhost_gpu::SetNVMAPfd(const std::vector& input, std::vector& output) { - set_nvmap_fd params{}; + IoctlSetNvmapFD params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_DEBUG(Service_NVDRV, "called, fd=%x", params.nvmap_fd); nvmap_fd = params.nvmap_fd; @@ -59,7 +59,7 @@ u32 nvhost_gpu::SetNVMAPfd(const std::vector& input, std::vector& output u32 nvhost_gpu::SetClientData(const std::vector& input, std::vector& output) { LOG_DEBUG(Service_NVDRV, "called"); - client_data params{}; + IoctlClientData params{}; std::memcpy(¶ms, input.data(), input.size()); user_data = params.data; std::memcpy(output.data(), ¶ms, output.size()); @@ -68,7 +68,7 @@ u32 nvhost_gpu::SetClientData(const std::vector& input, std::vector& out u32 nvhost_gpu::GetClientData(const std::vector& input, std::vector& output) { LOG_DEBUG(Service_NVDRV, "called"); - client_data params{}; + IoctlClientData params{}; std::memcpy(¶ms, input.data(), input.size()); params.data = user_data; std::memcpy(output.data(), ¶ms, output.size()); @@ -83,7 +83,7 @@ u32 nvhost_gpu::ZCullBind(const std::vector& input, std::vector& output) } u32 nvhost_gpu::SetErrorNotifier(const std::vector& input, std::vector& output) { - set_error_notifier params{}; + IoctlSetErrorNotifier params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, offset=%lx, size=%lx, mem=%x", params.offset, params.size, params.mem); @@ -99,7 +99,7 @@ u32 nvhost_gpu::SetChannelPriority(const std::vector& input, std::vector } u32 nvhost_gpu::AllocGPFIFOEx2(const std::vector& input, std::vector& output) { - alloc_gpfifo_ex2 params{}; + IoctlAllocGpfifoEx2 params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, num_entries=%x, flags=%x, unk0=%x, unk1=%x, unk2=%x, unk3=%x", @@ -112,7 +112,7 @@ u32 nvhost_gpu::AllocGPFIFOEx2(const std::vector& input, std::vector& ou } u32 nvhost_gpu::AllocateObjectContext(const std::vector& input, std::vector& output) { - alloc_obj_ctx params{}; + IoctlAllocObjCtx params{}; std::memcpy(¶ms, input.data(), input.size()); LOG_WARNING(Service_NVDRV, "(STUBBED) called, class_num=%x, flags=%x", params.class_num, params.flags); @@ -124,12 +124,12 @@ u32 nvhost_gpu::AllocateObjectContext(const std::vector& input, std::vector< u32 nvhost_gpu::SubmitGPFIFO(const std::vector& input, std::vector& output) { if (input.size() < 24) UNIMPLEMENTED(); - submit_gpfifo params{}; + IoctlSubmitGpfifo params{}; std::memcpy(¶ms, input.data(), 24); LOG_WARNING(Service_NVDRV, "(STUBBED) called, gpfifo=%lx, num_entries=%x, flags=%x", params.gpfifo, params.num_entries, params.flags); - auto entries = std::vector(); + auto entries = std::vector(); entries.resize(params.num_entries); std::memcpy(&entries[0], &input.data()[24], params.num_entries * 8); for (u32 i = 0; i < params.num_entries; i++) { diff --git a/src/core/hle/service/nvdrv/devices/nvhost_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_gpu.h index 5e842ce880..4fe5ab8fd7 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_gpu.h @@ -32,7 +32,7 @@ private: IocAllocObjCtxCommand = 0xC0104809, }; - enum class CtxObjects { + enum class CtxObjects : u32 { Ctx2D = 0x902D, Ctx3D = 0xB197, CtxCompute = 0xB1C0, @@ -41,64 +41,74 @@ private: CtxChannelGPFIFO = 0xB06F, }; - struct set_nvmap_fd { + struct IoctlSetNvmapFD { u32_le nvmap_fd; }; + static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size"); - struct client_data { + struct IoctlClientData { u64_le data; }; + static_assert(sizeof(IoctlClientData) == 8, "IoctlClientData is incorrect size"); - struct zcull_bind { + struct IoctlZCullBind { u64_le gpu_va; u32_le mode; // 0=global, 1=no_ctxsw, 2=separate_buffer, 3=part_of_regular_buf - u32_le padding; + INSERT_PADDING_WORDS(1); }; + static_assert(sizeof(IoctlZCullBind) == 16, "IoctlZCullBind is incorrect size"); - struct set_error_notifier { + struct IoctlSetErrorNotifier { u64_le offset; u64_le size; u32_le mem; // nvmap object handle - u32_le padding; + INSERT_PADDING_WORDS(1); }; + static_assert(sizeof(IoctlSetErrorNotifier) == 24, "IoctlSetErrorNotifier is incorrect size"); - struct fence { + struct IoctlFence { u32_le id; u32_le value; }; + static_assert(sizeof(IoctlFence) == 8, "IoctlFence is incorrect size"); - struct alloc_gpfifo_ex2 { - u32_le num_entries; // in - u32_le flags; // in - u32_le unk0; // in (1 works) - fence fence_out; // out - u32_le unk1; // in - u32_le unk2; // in - u32_le unk3; // in + struct IoctlAllocGpfifoEx2 { + u32_le num_entries; // in + u32_le flags; // in + u32_le unk0; // in (1 works) + IoctlFence fence_out; // out + u32_le unk1; // in + u32_le unk2; // in + u32_le unk3; // in }; + static_assert(sizeof(IoctlAllocGpfifoEx2) == 32, "IoctlAllocGpfifoEx2 is incorrect size"); - struct alloc_obj_ctx { + struct IoctlAllocObjCtx { u32_le class_num; // 0x902D=2d, 0xB197=3d, 0xB1C0=compute, 0xA140=kepler, 0xB0B5=DMA, // 0xB06F=channel_gpfifo u32_le flags; u64_le obj_id; // (ignored) used for FREE_OBJ_CTX ioctl, which is not supported }; + static_assert(sizeof(IoctlAllocObjCtx) == 16, "IoctlAllocObjCtx is incorrect size"); - struct gpfifo_entry { + struct IoctlGpfifoEntry { u32_le entry0; // gpu_va_lo u32_le entry1; // gpu_va_hi | (unk_0x02 << 0x08) | (size << 0x0A) | (unk_0x01 << 0x1F) }; + static_assert(sizeof(IoctlGpfifoEntry) == 8, "IoctlGpfifoEntry is incorrect size"); - struct submit_gpfifo { + struct IoctlSubmitGpfifo { u64_le gpfifo; // (ignored) pointer to gpfifo fence structs u32_le num_entries; // number of fence objects being submitted u32_le flags; - fence fence_out; // returned new fence object for others to wait on + IoctlFence fence_out; // returned new fence object for others to wait on }; + static_assert(sizeof(IoctlSubmitGpfifo) == 16 + sizeof(IoctlFence), + "submit_gpfifo is incorrect size"); u32_le nvmap_fd{}; u64_le user_data{}; - zcull_bind zcull_params{}; + IoctlZCullBind zcull_params{}; u32_le channel_priority{}; u32 SetNVMAPfd(const std::vector& input, std::vector& output); diff --git a/src/core/hle/service/nvdrv/interface.cpp b/src/core/hle/service/nvdrv/interface.cpp index 33323bd1fe..0edb64cc31 100644 --- a/src/core/hle/service/nvdrv/interface.cpp +++ b/src/core/hle/service/nvdrv/interface.cpp @@ -76,7 +76,7 @@ void NVDRV::QueryEvent(Kernel::HLERequestContext& ctx) { IPC::RequestParser rp{ctx}; u32 fd = rp.Pop(); u32 event_id = rp.Pop(); - LOG_WARNING(Service, "(STUBBED) called, fd=%x, event_id=%x", fd, event_id); + LOG_WARNING(Service_NVDRV, "(STUBBED) called, fd=%x, event_id=%x", fd, event_id); IPC::ResponseBuilder rb{ctx, 2, 1}; rb.Push(RESULT_SUCCESS); @@ -96,7 +96,7 @@ void NVDRV::SetClientPID(Kernel::HLERequestContext& ctx) { } void NVDRV::FinishInitialize(Kernel::HLERequestContext& ctx) { - LOG_WARNING(Service, "(STUBBED) called"); + LOG_WARNING(Service_NVDRV, "(STUBBED) called"); IPC::ResponseBuilder rb{ctx, 2}; rb.Push(RESULT_SUCCESS); }